Comparing Real-Time Calculus with the existing analytical approaches for the performance evaluation of network interfaces. - Godofredo R. Garay; Julio Ortega Lopera; Vicente Alarcón Aquino (CONIELECOMP, 2011)

System performance evaluation by combining RTC and VHDL simulation: A case study on NICs. - Godofredo R. Garay; Julio Ortega Lopera; Antonio F. Díaz; Luis Corrales; Vicente Alarcón Aquino (J. Syst. Archit., 2013)

Visualization of VHDL-based simulations as a pedagogical tool for supporting computer science education. - Godofredo R. Garay; Andrei Tchernykh; Alexander Yu. Drozdov; Sergey N. Garichev; Sergio Nesmachnow; Moisés Torres-Martinez (J. Comput. Sci., 2019)