Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic. - Gopal Paul; Sambhu Nath Pradhan; Ajit Pal; Bhargab B. Bhattacharya (APCCAS, 2006)

On finding the minimum test set of a BDD-based circuit. - Gopal Paul; Ajit Pal; Bhargab B. Bhattacharya (ACM Great Lakes Symposium on VLSI, 2006)

A BDD-Based Design of an Area-Power Efficient Asynchronous Adder. - Gopal Paul; Rohit Reddy; Chittaranjan A. Mandal; Bhargab B. Bhattacharya (ISVLSI, 2010)

A BDD-based approach to design power-aware on-line detectors for digital circuits. - Gopal Paul; Santosh Biswas; Chittaranjan A. Mandal; Bhargab B. Bhattacharya (SoCC, 2010)

A Fuzzy Logic Approach in Emotion Detection and Recognition and Formulation of an Odor-Based Emotional Fitness Assistive System. - Sudipta Ghosh; Debasish Kundu; Gopal Paul (Int. J. Synth. Emot., 2015)