Gopalakrishnan Sundararajan

Orcid: 0000-0001-8360-1829

According to our database1, Gopalakrishnan Sundararajan authored at least 5 papers between 2013 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
ASIC Design of a Noisy Gradient Descent Bit Flip Decoder for 10GBASE-T Ethernet Standard.
CoRR, 2016

CNTFET-RFB: An Error Correction Implementation for Multi-valued CNTFET Logic.
Proceedings of the 46th IEEE International Symposium on Multiple-Valued Logic, 2016

2015
Decoding LDPC codes via Noisy Gradient Descent Bit-Flipping with Re-Decoding.
CoRR, 2015

2014
Noisy Gradient Descent Bit-Flip Decoding for LDPC Codes.
IEEE Trans. Commun., 2014

2013
A Winner-Take-All circuit with improved accuracy and tolerance to mismatch and process variations.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013


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