Hardware Acceleration Alone Will Not Make Fault Grading ULSI a Reality. - Gopi Ganapathy; Jacob A. Abraham (ITC, 1991)

Selective Pseudo Scan: Combinational ATPG with Reduced Scan in a Full Custom RISC Microprocessor. - Gopi Ganapathy; Jacob A. Abraham (DAC, 1993)

Hardware Emulation for Functional Verification of K5. - Gopi Ganapathy; Ram Narayan; Glenn Jorden; Denzil Fernandez; Ming Wang; Jim Nishimura (DAC, 1996)

Practical Test and DFT for Next Generation VLSI. - Jacob A. Abraham; Gopi Ganapathy (VLSI Design, 1996)