Annotated data types for addressed token passing networks. - Gordon Cichon; Winthir Brunnbauer (DATE, 2001)

Bringing two worlds together: AAL2 over IP for radio access networks. - Winthir Brunnbauer; Gordon Cichon (GLOBECOM, 2001)

Schnittstellenbasierter Entwurf mit wiederverwendbaren Modulen (Interface Based Design Based With Reusable Modules). - Gordon Cichon (Informationstechnik Tech. Inform., 2002)

Implementation of recursive digital filters into vector SIMD DSP architectures. - Juan Pablo Robelly; Gordon Cichon; Hendrik Seidel; Gerhard P. Fettweis (ICASSP (5), 2004)

Compiler Scheduling for STA-Processors. - Gordon Cichon; Pablo Robelly; Hendrik Seidel; Marcus Bronzel; Gerhard P. Fettweis (PARELEC, 2004)

Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach. - Pablo Robelly; Gordon Cichon; Hendrik Seidel; Gerhard P. Fettweis (PARELEC, 2004)

Hardware / Software Co-Design of a SIMD-DSP-Based DVB-T Receiver. - Hendrik Seidel; Gordon Cichon; Pablo Robelly; Marcus Bronzel; Gerhard P. Fettweis (PARELEC, 2004)

MOUSE: A Shortcut from Matlab Source to SIMD DSP Assembly Code. - Gordon Cichon; Gerhard P. Fettweis (SAMOS, 2004)

Synchronous Transfer Architecture (STA). - Gordon Cichon; Pablo Robelly; Hendrik Seidel; Emil Matús; Marcus Bronzel; Gerhard P. Fettweis (SAMOS, 2004)

Generated DSP Cores for Implementation of an OFDM Communication System. - Hendrik Seidel; Emil Matús; Gordon Cichon; Pablo Robelly; Marcus Bronzel; Gerhard P. Fettweis (SAMOS, 2004)

A Compiler-friendly and Low-power DSP architecture. - Emil Matús; Gordon Cichon; Hendrik Seidel; Pablo Robelly; Torsten Limberg; Gerhard P. Fettweis (GI Jahrestagung (1), 2005)

Design and automatic code generation of the LMS algorithm for SIMD signal processors. - Juan Pablo Robelly; Gordon Cichon; Hendrik Seidel; Gerhard P. Fettweis (ICASSP (5), 2005)

A HW/SW design methodology for embedded SIMD vector signal processors. - Pablo Robelly; Gordon Cichon; Hendrik Ahlendorf; Gerhard P. Fettweis (Int. J. Embed. Syst., 2008)

Formal Semantics of Synchronous Transfer Architecture. - Gordon Cichon; Martin Hofmann 001 (Modellierung, 2014)

A Data Locality and Memory Contention Analysis Method in Embedded NUMA Multi-core Systems. - Lin Li; Markus Fussenegger; Gordon Cichon (MCSoC, 2016)

An error-tolerant serial binary full-adder via a spiking neural P system using HP/LP basic neurons. - Otgonnaran Ochirbat; Tseren-Onolt Ishdorj; Gordon Cichon (J. Membr. Comput., 2020)

Implementation of RSA cryptographic algorithm using SN P systems based on HP/LP neurons. - Ganbat Ganbaatar; Dugar Nyamdorj; Gordon Cichon; Tseren-Onolt Ishdorj (J. Membr. Comput., 2021)