VLSI Implementation of a Fault-Tolerant Distributed Clock Generation. - Markus Ferringer; Gottfried Fuchs; Andreas Steininger; Gerald Kempf (DFT, 2006)

Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip. - Matthias Függer; Ulrich Schmid 001; Gottfried Fuchs; Gerald Kempf (EDCC, 2006)

Implications of VLSI Fault Models and Distributed Systems Failure Models - A hardware designer's view. - Gottfried Fuchs (Fault-Tolerant Distributed Algorithms on VLSI Chips, 2008)

Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip. - Gottfried Fuchs; Matthias Függer; Ulrich Schmid 001; Andreas Steininger (DSD, 2008)

On the Threat of Metastability in an Asynchronous Fault-Tolerant Clock Generation Scheme. - Gottfried Fuchs; Matthias Függer; Andreas Steininger (ASYNC, 2009)

VLSI Implementation of a Distributed Algorithm for Fault-Tolerant Clock Generation. - Gottfried Fuchs; Andreas Steininger (J. Electr. Comput. Eng., 2011)