Parametric Analysis to Reduce Phase Noise of Frequency Synthesizers for Wireless Communication System. - Govind Singh Patel; Sanjay Sharma (Wirel. Pers. Commun., 2014)

Parametric Analysis of a Novel Architecture of Phase Locked Loop for Communication System. - Govind Singh Patel; Sanjay Sharma (Wirel. Pers. Commun., 2014)

Design of Low Power Si0.7Ge0.3 Pocket Junction-Less Tunnel FET Using Below 5 nm Technology. - Suman Lata Tripathi; Govind Singh Patel (Wirel. Pers. Commun., 2020)

Study of End to End Image Processing System Including Image De-noising, Image Compression & Image Security. - Sandeep K. Shelke; Sanjeet Kumar Sinha; Govind Singh Patel (Wirel. Pers. Commun., 2021)

Design of Power, Area and Delay Optimized Direct Digital Synthesizer Using Modified 32-Bit Square Root Carry Select Adder. - Raju Ganna; Shanky Saxena; Govind Singh Patel (J. Circuits Syst. Comput., 2022)

An Ultra-Low-Power C-Band FMCW Transmitter Using a Fast Settling Fractional-N DPLL and Ring-Based Pulse Injection Locking Oscillator. - Abdul Muqueem; Shanky Saxena; Govind Singh Patel (J. Circuits Syst. Comput., 2023)

A Design and Investigation Inexact Compressor Based on Low Power Multiplier. - Sheetal Nagar; Shanky Saxena; Govind Singh Patel; Seema Nayak; Abhishek Kumar (J. Circuits Syst. Comput., 2023)