A Metastability Immune Timing Error Masking Flip-Flop for Dynamic Variation Tolerance. - Govinda Sannena; Bishnu Prasad Das (ACM Great Lakes Symposium on VLSI, 2016)

Area and Power-Efficient Timing Error Predictor for Dynamic Voltage and Frequency Scaling Application. - Govinda Sannena; Bishnu Prasad Das (iNIS, 2016)

Metastability immune and area efficient error masking flip-flop for timing error resilient designs. - Govinda Sannena; Bishnu Prasad Das (Integr., 2018)

Low Overhead Warning Flip-Flop Based on Charge Sharing for Timing Slack Monitoring. - Govinda Sannena; Bishnu Prasad Das (IEEE Trans. Very Large Scale Integr. Syst., 2018)