EffiTest: efficient delay test and statistical prediction for configuring post-silicon tunable buffers. - Grace Li Zhang; Bing Li 005; Ulf Schlichtmann (DAC, 2016)

Sampling-based buffer insertion for post-silicon yield improvement under process variability. - Grace Li Zhang; Bing Li 005; Ulf Schlichtmann (DATE, 2016)

PieceTimer: a holistic timing analysis framework considering setup/hold time interdependency using a piecewise model. - Grace Li Zhang; Bing Li 005; Ulf Schlichtmann (ICCAD, 2016)

Application of machine learning methods in post-silicon yield improvement. - Baris Yigit; Grace Li Zhang; Bing Li 005; Yiyu Shi 001; Ulf Schlichtmann (SoCC, 2017)

Virtualsync: timing optimization by synchronizing logic waves with sequential and combinational components as delay units. - Grace Li Zhang; Bing Li 005; Masanori Hashimoto; Ulf Schlichtmann (DAC, 2018)

TimingCamouflage: Improving circuit security against counterfeiting by unconventional timing. - Grace Li Zhang; Bing Li 005; Bei Yu 001; David Z. Pan; Ulf Schlichtmann (DATE, 2018)

Timing with Virtual Signal Synchronization for Circuit Performance and Netlist Security. - Grace Li Zhang; Bing Li 005; Ulf Schlichtmann (ISVLSI, 2018)

Design-Phase Buffer Allocation for Post-Silicon Clock Binning by Iterative Learning. - Grace Li Zhang; Bing Li 005; Jinglan Liu; Yiyu Shi 001; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Aging-aware Lifetime Enhancement for Memristor-based Neuromorphic Computing. - Shuhang Zhang; Grace Li Zhang; Bing Li 005; Hai Helen Li; Ulf Schlichtmann (DATE, 2019)

EffiTest2: Efficient Delay Test and Prediction for Post-Silicon Clock Skew Configuration Under Process Variations. - Grace Li Zhang; Bing Li 005; Yiyu Shi 001; Jiang Hu; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Lifetime Enhancement for RRAM-based Computing-In-Memory Engine Considering Aging and Thermal Effects. - Shuhang Zhang; Grace Li Zhang; Bing Li 005; Hai Helen Li; Ulf Schlichtmann (AICAS, 2020)

Timing Resilience for Efficient and Secure Circuits. - Grace Li Zhang; Michaela Brunner; Bing Li 005; Georg Sigl; Ulf Schlichtmann (ASP-DAC, 2020)

Statistical Training for Neuromorphic Computing using Memristor-based Crossbars Considering Process Variations and Noise. - Ying Zhu 008; Grace Li Zhang; Tianchen Wang; Bing Li 005; Yiyu Shi 001; Tsung-Yi Ho; Ulf Schlichtmann (DATE, 2020)

Reliable and Robust RRAM-based Neuromorphic Computing. - Grace Li Zhang; Bing Li 005; Ying Zhu 008; Shuhang Zhang; Tianchen Wang; Yiyu Shi 001; Tsung-Yi Ho; Hai (Helen) Li; Ulf Schlichtmann (ACM Great Lakes Symposium on VLSI, 2020)

PathDriver: A Path-Driven Architectural Synthesis Flow for Continuous-Flow Microfluidic Biochips. - Xing Huang 001; Youlin Pan; Grace Li Zhang; Bing Li 005; Wenzhong Guo; Tsung-Yi Ho; Ulf Schlichtmann (ICCAD, 2020)

Countering Variations and Thermal Effects for Accurate Optical Neural Networks. - Ying Zhu 008; Grace Li Zhang; Bing Li 005; Xunzhao Yin; Cheng Zhuo; Huaxi Gu; Tsung-Yi Ho; Ulf Schlichtmann (ICCAD, 2020)

TimingCamouflage+: Netlist Security Enhancement with Unconventional Timing (with Appendix). - Grace Li Zhang; Bing Li 005; Meng Li 004; Bei Yu 001; David Z. Pan; Michaela Brunner; Georg Sigl; Ulf Schlichtmann (CoRR, 2020)

TimingCamouflage+: Netlist Security Enhancement With Unconventional Timing. - Grace Li Zhang; Bing Li 005; Meng Li 004; Bei Yu 001; David Z. Pan; Michaela Brunner; Georg Sigl; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Robustness of Neuromorphic Computing with RRAM-based Crossbars and Optical Neural Networks. - Grace Li Zhang; Bing Li 005; Ying Zhu 008; Tianchen Wang; Yiyu Shi 001; Xunzhao Yin; Cheng Zhuo; Huaxi Gu; Tsung-Yi Ho; Ulf Schlichtmann (ASP-DAC, 2021)

Bayesian Inference Based Robust Computing on Memristor Crossbar. - Di Gao; Qingrong Huang; Grace Li Zhang; Xunzhao Yin; Bing Li 005; Ulf Schlichtmann; Cheng Zhuo (DAC, 2021)

Energy-Aware Designs of Ferroelectric Ternary Content Addressable Memory. - Yu Qian; Zhenhao Fan; Haoran Wang; Chao Li 065; Mohsen Imani; Kai Ni 004; Grace Li Zhang; Bing Li 005; Ulf Schlichtmann; Cheng Zhuo; Xunzhao Yin (DATE, 2021)

Hardware-Software Codesign of Weight Reshaping and Systolic Array Multiplexing for Efficient CNNs. - Jingyao Zhang 002; Huaxi Gu; Grace Li Zhang; Bing Li 005; Ulf Schlichtmann (DATE, 2021)

An Efficient Programming Framework for Memristor-based Neuromorphic Computing. - Grace Li Zhang; Bing Li 005; Xing Huang 001; Chen Shen; Shuhang Zhang; Florin Burcea; Helmut Graeb; Tsung-Yi Ho; Hai Li 001; Ulf Schlichtmann (DATE, 2021)

Reliable Memristor-based Neuromorphic Design Using Variation- and Defect-Aware Training. - Di Gao; Grace Li Zhang; Xunzhao Yin; Bing Li 005; Ulf Schlichtmann; Cheng Zhuo (ICCAD, 2021)

A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-Widths. - Chuliang Guo; Li Zhang 021; Xian Zhou; Grace Li Zhang; Bing Li 005; Weikang Qian; Xunzhao Yin; Cheng Zhuo (ACM J. Emerg. Technol. Comput. Syst., 2021)

Energy efficient data search design and optimization based on a compact ferroelectric FET content addressable memory. - Jiahao Cai; Mohsen Imani; Kai Ni 004; Grace Li Zhang; Bing Li 005; Ulf Schlichtmann; Cheng Zhuo; Xunzhao Yin (DAC, 2022)

RRAM-based Neuromorphic Computing: Data Representation, Architecture, Logic, and Programming. - Grace Li Zhang; Shuhang Zhang; Hai Helen Li; Ulf Schlichtmann (DSD, 2022)

Aging Aware Retraining for Memristor-based Neuromorphic Computing. - Wenwen Ye; Grace Li Zhang; Bing Li 005; Ulf Schlichtmann; Cheng Zhuo; Xunzhao Yin (ISCAS, 2022)

PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips. - Xing Huang 001; Youlin Pan; Grace Li Zhang; Bing Li 005; Wenzhong Guo; Tsung-Yi Ho; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

VirtualSync+: Timing Optimization With Virtual Synchronization. - Grace Li Zhang; Bing Li 005; Xing Huang 001; Xunzhao Yin; Cheng Zhuo; Masanori Hashimoto; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

PowerPruning: Selecting Weights and Activations for Power-Efficient Neural Network Acceleration. - Richard Petri 002; Grace Li Zhang; Yiran Chen 001; Ulf Schlichtmann; Bing Li 005 (DAC, 2023)

CorrectNet: Robustness Enhancement of Analog In-Memory Computing for Neural Networks by Error Suppression and Compensation. - Amro Eldebiky; Grace Li Zhang; Georg Böcherer; Bing Li 005; Ulf Schlichtmann (DATE, 2023)

Countering Uncertainties in In-Memory-Computing Platforms with Statistical Training, Accuracy Compensation and Recursive Test. - Amro Eldebiky; Grace Li Zhang; Bing Li 005 (DATE, 2023)

Class-based Quantization for Neural Networks. - Wenhao Sun; Grace Li Zhang; Huaxi Gu; Bing Li 005; Ulf Schlichtmann (DATE, 2023)

SteppingNet: A Stepping Neural Network with Incremental Accuracy Enhancement. - Wenhao Sun; Grace Li Zhang; Xunzhao Yin; Cheng Zhuo; Huaxi Gu; Bing Li 005; Ulf Schlichtmann (DATE, 2023)

A Novel and Efficient Block-Based Programming for ReRAM-Based Neuromorphic Computing. - Wei-Lun Chen; Fang-Yi Gu; Ing-Chao Lin; Grace Li Zhang; Bing Li 005; Ulf Schlichtmann (ICCAD, 2023)

NearUni: Near-Unitary Training for Efficient Optical Neural Networks. - Amro Eldebiky; Bing Li 005; Grace Li Zhang (ICCAD, 2023)

Expressivity Enhancement with Efficient Quadratic Neurons for Convolutional Neural Networks. - Chuangtao Chen 001; Grace Li Zhang; Xunzhao Yin; Cheng Zhuo; Ulf Schlichtmann; Bing Li 005 (CoRR, 2023)

Early Classification for Dynamic Inference of Neural Networks. - Jingcun Wang; Bing Li 005; Grace Li Zhang (CoRR, 2023)

Machine Learning in Advanced IC Design: A Methodological Survey. - Tinghuan Chen; Grace Li Zhang; Bei Yu 001; Bing Li 005; Ulf Schlichtmann (IEEE Des. Test, 2023)

Ferroelectric Ternary Content Addressable Memories for Energy-Efficient Associative Search. - Xunzhao Yin; Yu Qian; Mohsen Imani; Kai Ni 004; Chao Li 065; Grace Li Zhang; Bing Li 005; Ulf Schlichtmann; Cheng Zhuo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

BRoCoM: A Bayesian Framework for Robust Computing on Memristor Crossbar. - Di Gao; Zeyu Yang; Qingrong Huang; Grace Li Zhang; Xunzhao Yin; Bing Li 005; Ulf Schlichtmann; Cheng Zhuo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Early-Exit with Class Exclusion for Efficient Inference of Neural Networks. - Jingcun Wang; Bing Li 005; Grace Li Zhang (AICAS, 2024)

Logic Design of Neural Networks for High-Throughput and Low-Power Applications. - Kangwei Xu; Grace Li Zhang; Ulf Schlichtmann; Bing Li 005 (ASPDAC, 2024)

Computational and Storage Efficient Quadratic Neurons for Deep Neural Networks. - Chuangtao Chen 001; Grace Li Zhang; Xunzhao Yin; Cheng Zhuo; Ulf Schlichtmann; Bing Li 005 (DATE, 2024)

A FeFET-based Time-Domain Associative Memory for Multi-bit Similarity Computation. - Qingrong Huang; Hamza Errahmouni Barkam; Zeyu Yang; Jianyi Yang 003; Thomas Kämpfe; Kai Ni 004; Grace Li Zhang; Bing Li 005; Ulf Schlichtmann; Mohsen Imani; Cheng Zhuo; Xunzhao Yin (DATE, 2024)

ScanCamouflage: Obfuscating Scan Chains with Camouflaged Sequential and Logic Gates. - Tarik Ibrahimpasic; Grace Li Zhang; Michaela Brunner; Georg Sigl; Bing Li 005; Ulf Schlichtmann (DATE, 2024)

Class-Aware Pruning for Efficient Neural Networks. - Mengnan Jiang; Jingcun Wang; Amro Eldebiky; Xunzhao Yin; Cheng Zhuo; Ing-Chao Lin; Grace Li Zhang (DATE, 2024)

OplixNet: Towards Area-Efficient Optical Split-Complex Networks with Real-to-Complex Data Assignment and Knowledge Distillation. - Ruidi Qiu; Amro Eldebiky; Grace Li Zhang; Xunzhao Yin; Cheng Zhuo; Ulf Schlichtmann; Bing Li 005 (DATE, 2024)

BasisN: Reprogramming-Free RRAM-Based In-Memory-Computing by Basis Combination for Deep Neural Networks. - Amro Eldebiky; Grace Li Zhang; Xunzhao Yin; Cheng Zhuo; Ing-Chao Lin; Ulf Schlichtmann; Bing Li 005 (ICCAD, 2024)

AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design. - Ruidi Qiu; Grace Li Zhang; Rolf Drechsler; Ulf Schlichtmann; Bing Li 005 (MLCAD, 2024)

Automated C/C++ Program Repair for High-Level Synthesis via Large Language Models. - Kangwei Xu; Grace Li Zhang; Xunzhao Yin; Cheng Zhuo; Ulf Schlichtmann; Bing Li 005 (MLCAD, 2024)

EncodingNet: A Novel Encoding-based MAC Design for Efficient Neural Network Acceleration. - Bo Liu; Grace Li Zhang; Xunzhao Yin; Ulf Schlichtmann; Bing Li 005 (CoRR, 2024)

LiveMind: Low-latency Large Language Models with Simultaneous Inference. - Chuangtao Chen 001; Grace Li Zhang; Xunzhao Yin; Cheng Zhuo; Ulf Schlichtmann; Bing Li 005 (CoRR, 2024)

Classification-Based Automatic HDL Code Generation Using LLMs. - Wenhao Sun; Bing Li 005; Grace Li Zhang; Xunzhao Yin; Cheng Zhuo; Ulf Schlichtmann (CoRR, 2024)

LLM-Aided Efficient Hardware Design Automation. - Kangwei Xu; Ruidi Qiu; Zhuorui Zhao; Grace Li Zhang; Ulf Schlichtmann; Bing Li 005 (CoRR, 2024)

CorrectNet+: Dealing With HW Non-Idealities in In-Memory-Computing Platforms by Error Suppression and Compensation. - Amro Eldebiky; Grace Li Zhang; Georg Böcherer; Bing Li 005; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

A 3D Hybrid Optical-Electrical NoC Using Novel Mapping Strategy Based DCNN Dataflow Acceleration. - Bowen Zhang 004; Huaxi Gu; Grace Li Zhang; Yintang Yang; Ziteng Ma; Ulf Schlichtmann (IEEE Trans. Parallel Distributed Syst., 2024)

An Efficient General-Purpose Optical Accelerator for Neural Networks. - Sijie Fei; Amro Eldebiky; Grace Li Zhang; Bing Li 005; Ulf Schlichtmann (ASP-DAC, 2025)

CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design. - Ruidi Qiu; Grace Li Zhang; Rolf Drechsler; Ulf Schlichtmann; Bing Li 005 (DATE, 2025)

Large Language Models (LLMs) for Verification, Testing, and Design. - Chandan Kumar Jha 001; Muhammad Hassan 001; Khushboo Qayyum; Sallar Ahmadi-Pour; Kangwei Xu; Ruidi Qiu; Jason Blocklove; Luca Collini; Andre Nakkab; Ulf Schlichtmann; Grace Li Zhang; Ramesh Karri; et al. (ETS, 2025)

Basis Sharing: Cross-Layer Parameter Sharing for Large Language Model Compression. - Jingcun Wang; Yu-Guang Chen; Ing-Chao Lin; Bing Li 005; Grace Li Zhang (ICLR, 2025)

Paradigm-Based Automatic HDL Code Generation Using LLMs. - Wenhao Sun; Bing Li 005; Grace Li Zhang; Xunzhao Yin; Cheng Zhuo; Ulf Schlichtmann (ISQED, 2025)

VRank: Enhancing Verilog Code Generation from Large Language Models via Self-Consistency. - Zhuorui Zhao; Ruidi Qiu; Ing-Chao Lin; Grace Li Zhang; Bing Li 005; Ulf Schlichtmann (ISQED, 2025)

Efficient Neural Network Compression for Fast Inference on Hardware. - Jingcun Wang; Mengnan Jiang; Grace Li Zhang (ISVLSI, 2025)

HLSTester: Efficient Testing of Behavioral Discrepancies with LLMs for High-Level Synthesis. - Kangwei Xu; Bing Li 005; Grace Li Zhang; Ulf Schlichtmann (CoRR, 2025)

A Scalable 2T-1FeFET-Based Content Addressable Memory Design for Energy Efficient Data Search. - Jiahao Cai; Hamza Errahmouni Barkam; Mohsen Imani; Kai Ni 004; Grace Li Zhang; Bing Li 005; Ulf Schlichtmann; Cheng Zhuo; Xunzhao Yin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Deep Joint Source-Channel Coding for Small Satellite Applications. - Olga Kondrateva; Grace Li Zhang; Julian Zobel; Björn Scheuermann 001; Stefan Dietzel (CoRR, 2025)

CompressKV: Semantic Retrieval Heads Know What Tokens are Not Important Before Generation. - Xiaolin Lin; Jingcun Wang; Olga Kondrateva; Yiyu Shi 001; Bing Li 005; Grace Li Zhang (CoRR, 2025)