A scalable FPGA-based design for field programmable large-scale ion channel simulations. - Graeme Coapes; Terrence S. T. Mak; Junwen Luo; Alex Yakovlev; Chi-Sang Poon (FPL, 2012)

Towards reliable hybrid bio-silicon integration using novel adaptive control system. - Junwen Luo; Patrick Degenaar; Graeme Coapes; Alex Yakovlev; Terrence S. T. Mak; Peter Andras 001 (ISCAS, 2013)

A scalable FPGA-based cerebellum for passage-of-time representation. - Junwen Luo; Graeme Coapes; Terrence S. T. Mak; Tadashi Yamazaki; Chung Tin; Patrick Degenaar (EMBC, 2014)

A real-time silicon cerebellum spiking neural model based on FPGA. - Junwen Luo; Graeme Coapes; Patrick Degenaar; Tadashi Yamazaki; Terrence S. T. Mak; Chung Tin (ISIC, 2014)

Real-Time Simulation of Passage-of-Time Encoding in Cerebellum Using a Scalable FPGA-Based System. - Junwen Luo; Graeme Coapes; Terrence S. T. Mak; Tadashi Yamazaki; Chung Tin; Patrick Degenaar (IEEE Trans. Biomed. Circuits Syst., 2016)

Neural networks-on-chip for hybrid bio-electronic systems. - Graeme Coapes (2016)

PD Signal Attenuation in 550-kV GIS: Impact of Different Barriers on the Propagation of Electromagnetic Waves. - Ahmad Darwish; Graeme Coapes; Shady S. Refaat; Haitham Abu-Rub; Hamid A. Toliyat (IEEE Trans. Instrum. Meas., 2021)

Requirements for ultra-high frequency partial discharge monitoring systems for gas-insulated switchgear. - Wojciech Koltunowicz; Glenn Behrmann; Matthias Boltze; Andrea Caprara; Graeme Coapes; Fraser Cook; Hiroyuki Hama; Thomas Huecker; Carl Johnstone; Stefan Neuhold; Claus Neumann; Shinya Ohtsuka; et al. (Elektrotech. Informationstechnik, 2023)