CAD utilities to comprehend layout-dependent stress effects in 45 nm high- performance SOI custom macro design. - Akif Sultan; John Faricelli; Sushant Suryagandh; Hans vanMeer; Kaveri Mathur; James Pattison; Sean Hannon; Greg Constant; Kalyana Kumar; Kevin Carrejo; Joe Meier; Rasit Onur Topaloglu; et al. (ISQED, 2009)

An x86-64 core implemented in 32nm SOI CMOS. - Ravi Jotwani; Sriram Sundaram; Stephen Kosonocky; Alex Schaefer; Victor Andrade; Greg Constant; Amy Novak; Sam Naffziger (ISSCC, 2010)