Energy optimization techniques in cluster interconnects. - Eun Jung Kim 001; Ki Hwan Yum; Greg M. Link; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Mazin S. Yousif; Chita R. Das (ISLPED, 2003)

Fault Tolerant Algorithms for Network-On-Chip Interconnect. - Matthew Pirretti; Greg M. Link; Richard R. Brooks; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin (ISVLSI, 2004)

Evaluating Alternative Implementations for LDPC Decoder Check Node Function. - Theo Theocharides; Greg M. Link; Eric J. Swankoski; Narayanan Vijaykrishnan; Mary Jane Irwin; Herman Schmit (ISVLSI, 2004)

A generic reconfigurable neural network architecture as a network on chip. - Theocharis Theocharides; Greg M. Link; Narayanan Vijaykrishnan; Mary Jane Irwin; Vamsi Srikantam (SoCC, 2004)

Embedded Hardware Face Detection. - Theo Theocharides; Greg M. Link; Narayanan Vijaykrishnan; Mary Jane Irwin; Wayne H. Wolf (VLSI Design, 2004)

Resource-Driven Optimizations for Transient-Fault Detecting SuperScalar Microarchitectures. - Jie S. Hu; Greg M. Link; Johnsy K. John; Shuai Wang 006; Sotirios G. Ziavras (Asia-Pacific Computer Systems Architecture Conference, 2005)

FD-HGAC: a hybrid heuristic/genetic algorithm hardware/software co-synthesis framework with fault detection. - John Conner; Yuan Xie 001; Mahmut T. Kandemir; Robert P. Dick; Greg M. Link (ASP-DAC, 2005)

Hotspot Prevention Through Runtime Reconfiguration in Network-On-Chip. - Greg M. Link; Narayanan Vijaykrishnan (DATE, 2005)

Temperature-Aware Voltage Islands Architecting in System-on-Chip Design. - Wei-Lun Hung; Greg M. Link; Yuan Xie 001; Narayanan Vijaykrishnan; Nagu R. Dhanwada; John Conner (ICCD, 2005)

Implementing LDPC Decoding on Network-on-Chip. - Theo Theocharides; Greg M. Link; Narayanan Vijaykrishnan; Mary Jane Irwin (VLSI Design, 2005)

Networks on Chip (NoC): Interconnects of Next Generation Systems on Chip. - Theocharis Theocharides; Greg M. Link; Narayanan Vijaykrishnan; Mary Jane Irwin (Adv. Comput., 2005)

A Holistic Approach to Designing Energy-Efficient Cluster Interconnects. - Eun Jung Kim 001; Greg M. Link; Ki Hwan Yum; Narayanan Vijaykrishnan; Mahmut T. Kandemir; Mary Jane Irwin; Chita R. Das (IEEE Trans. Computers, 2005)

Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. - Wei-Lun Hung; Greg M. Link; Yuan Xie 001; Narayanan Vijaykrishnan; Mary Jane Irwin (ISQED, 2006)

Thermal Trends in Emerging Technologies. - Greg M. Link; Narayanan Vijaykrishnan (ISQED, 2006)

Poster reception - Energy/performance modeling for collective communication in 3-D torus cluster networks. - S. Conner; Greg M. Link; S. Tobita; Mary Jane Irwin; Padma Raghavan (SC, 2006)

Thermally robust clocking schemes for 3D integrated circuits. - Mosin Mondal; Andrew J. Ricketts; Sami Kirolos; Tamer Ragheb; Greg M. Link; Narayanan Vijaykrishnan; Yehia Massoud (DATE, 2007)

Load Miss Prediction - Exploiting Power Performance Trade-offs. - Konrad Malkowski; Greg M. Link; Padma Raghavan; Mary Jane Irwin (IPDPS, 2007)

Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers. - Mosin Mondal; Andrew J. Ricketts; Sami Kirolos; Tamer Ragheb; Greg M. Link; Narayanan Vijaykrishnan; Yehia Massoud (ISQED, 2007)

Design of Thermally Robust Clock Trees Using Dynamically Adaptive Clock Buffers. - Tamer Ragheb; Andrew J. Ricketts; Mosin Mondal; Sami Kirolos; Greg M. Link; Vijaykrishnan Narayanan; Yehia Massoud (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Teaching embedded systems using AVR microcontrollers: tutorial presentation. - David Hovemeyer; Greg M. Link (J. Comput. Sci. Coll., 2011)