A first-step towards an architecture tuning methodology for low power. - Greg Stitt; Frank Vahid; Tony Givargis; Roman L. Lysecky (CASES, 2000)

Propagating constants past software to hardware peripherals in fixed-application embedded systems. - Frank Vahid; Rilesh Patel; Greg Stitt (SIGARCH Comput. Archit. News, 2001)

Codesign-extended applications. - Brian Grattan; Greg Stitt; Frank Vahid (CODES, 2002)

Using On-Chip Configurable Logic to Reduce Embedded System Software Energy. - Greg Stitt; Brian Grattan; Jason R. Villarreal; Frank Vahid (FCCM, 2002)

Hardware/software partitioning of software binaries. - Greg Stitt; Frank Vahid (ICCAD, 2002)

Improving Software Performance with Configurable Logic. - Jason R. Villarreal; Dinesh C. Suresh; Greg Stitt; Frank Vahid; Walid A. Najjar (Des. Autom. Embed. Syst., 2002)

Energy Advantages of Microprocessor Platforms with On-Chip Configurable Logic. - Greg Stitt; Frank Vahid (IEEE Des. Test Comput., 2002)

Dynamic hardware/software partitioning: a first approach. - Greg Stitt; Roman L. Lysecky; Frank Vahid (DAC, 2003)

Profiling tools for hardware/software partitioning of embedded applications. - Dinesh C. Suresh; Walid A. Najjar; Frank Vahid; Jason R. Villarreal; Greg Stitt (LCTES, 2003)

Highly configurable platforms for embedded computing systems. - Frank Vahid; Roman L. Lysecky; Chuanjun Zhang; Greg Stitt (Microelectron. J., 2003)

Energy savings and speedups from partitioning critical software loops to hardware in embedded systems. - Greg Stitt; Frank Vahid; Shawn Nematbakhsh (ACM Trans. Embed. Comput. Syst., 2004)

Hardware/software partitioning of software binaries: a case study of H.264 decode. - Greg Stitt; Frank Vahid; Gordon McGregor; Brian Einloth (CODES+ISSS, 2005)

A Decompilation Approach to Partitioning Software for Microprocessor/FPGA Platforms. - Greg Stitt; Frank Vahid (DATE, 2005)

Techniques for synthesizing binaries to an advanced register/memory structure. - Greg Stitt; Zhi Guo; Walid A. Najjar; Frank Vahid (FPGA, 2005)

A code refinement methodology for performance-improved synthesis from C. - Greg Stitt; Frank Vahid; Walid A. Najjar (ICCAD, 2006)

Warp Processors. - Roman L. Lysecky; Greg Stitt; Frank Vahid (ACM Trans. Design Autom. Electr. Syst., 2006)

Thread warping: a framework for dynamic synthesis of thread accelerators. - Greg Stitt; Frank Vahid (CODES+ISSS, 2007)

Binary synthesis. - Greg Stitt; Frank Vahid (ACM Trans. Design Autom. Electr. Syst., 2007)

Traversal caches: a first step towards FPGA acceleration of pointer-based data structures. - Greg Stitt; Gaurav Chaudhari; James Coole (CODES+ISSS, 2008)

C is for circuits: capturing FPGA circuits as sequential code for portability. - Scott Sirowy; Greg Stitt; Frank Vahid (FPGA, 2008)

Hardware/software partitioning with multi-version implementation exploration. - Greg Stitt (ACM Great Lakes Symposium on VLSI, 2008)

Recursion flattening. - Greg Stitt; Jason R. Villarreal (ACM Great Lakes Symposium on VLSI, 2008)

Warp Processing: Dynamic Translation of Binaries to FPGA Circuits. - Frank Vahid; Greg Stitt; Roman L. Lysecky (Computer, 2008)

A Traversal Cache Framework for FPGA Acceleration of Pointer Data Structures: A Case Study on Barnes-Hut N-body Simulation. - James Coole; John Robert Wernsing; Greg Stitt (ReConFig, 2009)

SCF: a device- and language-independent task coordination framework for reconfigurable, heterogeneous systems. - Vikas Aggarwal; Rafael García; Greg Stitt; Alan D. George; Herman Lam (HPRCTA@SC, 2009)

Bridging parallel and reconfigurable computing with multilevel PGAS and SHMEM+. - Vikas Aggarwal; Alan D. George; Kishore Yalamanchili; Changil Yoon; Herman Lam; Greg Stitt (HPRCTA@SC, 2009)

A framework for core-level modeling and design of reconfigurable computing algorithms. - Gongyu Wang; Greg Stitt; Herman Lam; Alan D. George (HPRCTA@SC, 2009)

Intermediate fabrics: virtual architectures for circuit portability and fast placement and routing. - James Coole; Greg Stitt (CODES+ISSS, 2010)

Novo-G: A View at the HPC Crossroads for Scientific Computing. - Alan D. George; Herman Lam; Abhijeet Lawande; Carlo Pascoe; Greg Stitt (ERSA, 2010)

An Automated Scheduling and Partitioning Algorithm for Scalable Reconfigurable Computing Systems. - Casey Reardon; Alan D. George; Greg Stitt; Herman Lam (ERSA, 2010)

A scalable performance prediction heuristic for implementation planning on heterogeneous systems. - John Robert Wernsing; Greg Stitt (ESTIMedia, 2010)

High-level synthesis techniques for in-circuit assertion-based verification. - John Curreri; Greg Stitt; Alan D. George (IPDPS Workshops, 2010)

Elastic computing: a framework for transparent, portable, and adaptive multi-core heterogeneous computing. - John Robert Wernsing; Greg Stitt (LCTES, 2010)

Performance modeling for multilevel communication in SHMEM+. - Vikas Aggarwal; Changil Yoon; Alan D. George; Herman Lam; Greg Stitt (PGAS, 2010)

Traversal Caches: A Framework for FPGA Acceleration of Pointer Data Structures. - James Coole; Greg Stitt (Int. J. Reconfigurable Comput., 2010)

Novo-G: At the Forefront of Scalable Reconfigurable Supercomputing. - Alan D. George; Herman Lam; Greg Stitt (Comput. Sci. Eng., 2011)

An End-to-End Tool Flow for FPGA-Accelerated Scientific Computing. - Greg Stitt; Alan D. George; Herman Lam; Melissa C. Smith; Vikas Aggarwal; Gongyu Wang; Casey Reardon; Brian Holland; Seth Koehler; James Coole (IEEE Des. Test Comput., 2011)

Intermediate Fabrics: Virtual Architectures for Near-Instant FPGA Compilation. - Greg Stitt; James Coole (IEEE Embed. Syst. Lett., 2011)

High-Level Synthesis of In-Circuit Assertions for Verification, Debugging, and Timing Analysis. - John Curreri; Greg Stitt; Alan D. George (Int. J. Reconfigurable Comput., 2011)

Are Field-Programmable Gate Arrays Ready for the Mainstream? - Greg Stitt (IEEE Micro, 2011)

Thread Warping: Dynamic and Transparent Synthesis of Thread Accelerators. - Greg Stitt; Frank Vahid (ACM Trans. Design Autom. Electr. Syst., 2011)

Platform-aware bottleneck detection for reconfigurable computing applications. - Seth Koehler; Greg Stitt; Alan D. George (ACM Trans. Reconfigurable Technol. Syst., 2011)

A low-overhead interconnect architecture for virtual reconfigurable fabrics. - Aaron Landy; Greg Stitt (CASES, 2012)

The RACECAR heuristic for automatic function specialization on multi-core heterogeneous systems. - John Robert Wernsing; Greg Stitt; Jeremy Fowers (CASES, 2012)

BPR: fast FPGA placement and routing using macroblocks. - James Coole; Greg Stitt (CODES+ISSS, 2012)

Communication visualization for bottleneck detection of high-level synthesis applications. - John Curreri; Greg Stitt; Alan D. George (FPGA, 2012)

A performance and energy comparison of FPGAs, GPUs, and multicores for sliding-window applications. - Jeremy Fowers; Greg Brown; Patrick Cooke; Greg Stitt (FPGA, 2012)

VirtualRC: a virtual FPGA platform for applications and tools portability. - Robert Kirchgessner; Greg Stitt; Alan D. George; Herman Lam (FPGA, 2012)

RACECAR: a heuristic for automatic function specialization on multi-core heterogeneous systems. - John Robert Wernsing; Greg Stitt (PPoPP, 2012)

Bandwidth-Sensitivity-Aware Arbitration for FPGAs. - Lu Hao; Greg Stitt (IEEE Embed. Syst. Lett., 2012)

Elastic computing: A portable optimization framework for hybrid computers. - John Robert Wernsing; Greg Stitt (Parallel Comput., 2012)

RCML: An Environment for Estimation Modeling of Reconfigurable Computing Systems. - Casey Reardon; Brian Holland; Alan D. George; Greg Stitt; Herman Lam (ACM Trans. Embed. Comput. Syst., 2012)

SCF: A Framework for Task-Level Coordination in Reconfigurable, Heterogeneous Systems. - Vikas Aggarwal; Greg Stitt; Alan D. George; Changil Yoon (ACM Trans. Reconfigurable Technol. Syst., 2012)

A comparison of correntropy-based feature tracking on FPGAs and GPUs. - Patrick Cooke; Jeremy Fowers; Greg Stitt; Lee Hunt (ASAP, 2013)

Virtual finite-state-machine architectures for fast compilation and portability. - Lu Hao; Greg Stitt (ASAP, 2013)

Pseudo-constant logic optimization. - Aaron Landy; Greg Stitt (ASAP, 2013)

A high-performance, low-energy FPGA accelerator for correntropy-based feature tracking (abstract only). - Patrick Cooke; Jeremy Fowers; Lee Hunt; Greg Stitt (FPGA, 2013)

Dynafuse: dynamic dependence analysis for FPGA pipeline fusion and locality optimizations. - Jeremy Fowers; Greg Stitt (FPGA, 2013)

A performance and energy comparison of convolution on GPUs, FPGAs, and multicore processors. - Jeremy Fowers; Greg Brown; John Robert Wernsing; Greg Stitt (ACM Trans. Archit. Code Optim., 2013)

A High Memory Bandwidth FPGA Accelerator for Sparse Matrix-Vector Multiplication. - Jeremy Fowers; Kalin Ovtcharov; Karin Strauss; Eric S. Chung; Greg Stitt (FCCM, 2014)

A framework for dynamic parallelization of FPGA-accelerated applications. - Jeremy Fowers; Jianye Liu; Greg Stitt (SCOPES, 2014)

Fast, Flexible High-Level Synthesis from OpenCL using Reconfiguration Contexts. - James Coole; Greg Stitt (IEEE Micro, 2014)

An interpolation-based approach to multi-parameter performance modeling for heterogeneous systems. - Dylan Rudolph; Greg Stitt (ASAP, 2015)

A scheduling and binding heuristic for high-level synthesis of fault-tolerant FPGA applications. - Aniruddha Shastri; Greg Stitt; Eduardo Riccio (ASAP, 2015)

Adjustable-Cost Overlays for Runtime Compilation. - James Coole; Greg Stitt (FCCM, 2015)

Revisiting Serial Arithmetic: A Performance and Tradeoff Analysis for Parallel Applications on Modern FPGAs. - Aaron Landy; Greg Stitt (FCCM, 2015)

Core-Level Modeling and Frequency Prediction for DSP Applications on FPGAs. - Gongyu Wang; Greg Stitt; Herman Lam; Alan D. George (Int. J. Reconfigurable Comput., 2015)

Finite-State-Machine Overlay Architectures for Fast FPGA Compilation and Application Portability. - Patrick Cooke; Lu Hao; Greg Stitt (ACM Trans. Embed. Comput. Syst., 2015)

A Tradeoff Analysis of FPGAs, GPUs, and Multicores for Sliding-Window Applications. - Patrick Cooke; Jeremy Fowers; Greg Brown; Greg Stitt (ACM Trans. Reconfigurable Technol. Syst., 2015)

Low-Overhead FPGA Middleware for Application Portability and Productivity. - Robert Kirchgessner; Alan D. George; Greg Stitt (ACM Trans. Reconfigurable Technol. Syst., 2015)

Doubling FPGA Throughput via a Soft SerDes Architecture for Full-Bandwidth Serial Pipelining (Abstract Only). - Aaron Landy; Greg Stitt (FPGA, 2016)

Behavioral Emulation for Scalable Design-Space Exploration of Algorithms and Architectures. - Nalini Kumar; Carlo Pascoe; Christopher Hajas; Herman Lam; Greg Stitt; Alan D. George (ISC Workshops, 2016)

A Parallel Sliding-Window Generator for High-Performance Digital-Signal Processing on FPGAs. - Greg Stitt; Eric Schwartz; Patrick Cooke (ACM Trans. Reconfigurable Technol. Syst., 2016)

The Unified Accumulator Architecture: A Configurable, Portable, and Extensible Floating-Point Accumulator. - David Wilson 004; Greg Stitt (ACM Trans. Reconfigurable Technol. Syst., 2016)

Overlay-based side-channel countermeasures: A case study on correlated noise generation. - Austin Baylis; Greg Stitt; Ann Gordon-Ross (MWSCAS, 2017)

A Scalable, Low-Overhead Finite-State Machine Overlay for Rapid FPGA Application Development. - David Wilson 004; Greg Stitt (CoRR, 2017)

A Uniquified Virtualization Approach to Hardware Security. - Greg Stitt; Robert Karam; Kai Yang 028; Swarup Bhunia (IEEE Embed. Syst. Lett., 2017)

A High-Level Synthesis Scheduling and Binding Heuristic for FPGA Fault Tolerance. - David Wilson 004; Aniruddha Shastri; Greg Stitt (Int. J. Reconfigurable Comput., 2017)

Serial Arithmetic Strategies for Improving FPGA Throughput. - Aaron Landy; Greg Stitt (ACM Trans. Embed. Comput. Syst., 2017)

High-Frequency Absorption-FIFO Pipelining for Stratix 10 HyperFlex. - Madison N. Emas; Austin Baylis; Greg Stitt (FCCM, 2018)

Scalable Window Generation for the Intel Broadwell+Arria 10 and High-Bandwidth FPGA Systems. - Greg Stitt; Abhay Gupta; Madison N. Emas; David Wilson 004; Austin Baylis (FPGA, 2018)

A Recurrently Generated Overlay Architecture for Rapid FPGA Application Development. - David Wilson 004; Greg Stitt; James Coole (HEART, 2018)

Scalable Behavioral Emulation of Extreme-Scale Systems Using Structural Simulation Toolkit. - Ajay Ramaswamy; Nalini Kumar; Aravind Neelakantan; Herman Lam; Greg Stitt (ICPP, 2018)

Offloading cache configuration prediction to an FPGA for hardware speedup and overhead reduction: work-in-progress. - Ruben Vazquez; Ann Gordon-Ross; Greg Stitt (CODES+ISSS, 2019)

Machine Learning-based Prediction for Dynamic Architectural Optimizations. - Ruben Vazquez; Ann Gordon-Ross; Greg Stitt (IGSC, 2019)

Energy Prediction for Cache Tuning in Embedded Systems. - Ruben Vazquez; Ann Gordon-Ross; Greg Stitt (ICCD, 2019)

Multi-Parameter Performance Modeling using Symbolic Regression. - Sai P. Chenna; Greg Stitt; Herman Lam (HPCS, 2019)

A FPGA-Pipelined, High-Throughput Approach to Coarse-Grained Simulation of HPC Systems. - Carlo Pascoe; Ryan Blanchard; Herman Lam; Greg Stitt (HPCS, 2019)

PANDORA: a parallelizing approximation-discovery framework (WIP paper). - Greg Stitt; David Campbell (LCTES, 2019)

Machine Learning-based Prediction for Dynamic, Runtime Architectural Optimizations of Embedded Systems. - Ruben Vazquez; Ann Gordon-Ross; Greg Stitt (NORCAS, 2019)

Seiba: An FPGA Overlay-Based Approach to Rapid Application Development. - David Wilson 004; Greg Stitt (ReConFig, 2019)

FPGA Acceleration of Fluid-Flow Kernels. - Ryan Blanchard; Greg Stitt; Herman Lam (H2RC@SC, 2020)

PANDORA: An Architecture-Independent Parallelizing Approximation-Discovery Framework. - Greg Stitt; David Campbell (ACM Trans. Embed. Comput. Syst., 2020)

Scalable Performance Prediction of Irregular Workloads in Multi-Phase Particle-in-Cell Applications. - Sai P. Chenna; Herman Lam; Greg Stitt; S. Balachandar 001 (IPDPS Workshops, 2021)

Dynamic Scheduling for Heterogeneous Multicores. - Ruben Vazquez; Ayobami S. Edun; Ann Gordon-Ross; Greg Stitt (SN Comput. Sci., 2021)

Work-in-Progress: Toward a Robust, Reconfigurable Hardware Accelerator for Tree-Based Genetic Programming. - Christopher Crary; Wesley Piard; Britton Chesley; Greg Stitt (CASES, 2022)

Using FPGA Devices to Accelerate Tree-Based Genetic Programming: A Preliminary Exploration with Recent Technologies. - Christopher Crary; Wesley Piard; Greg Stitt; Caleb Bean; Benjamin M. Hicks (EuroGP, 2023)

An Exploration of ATPG Methods for Redacted IP and Reconfigurable Hardware. - Jackson Fugate; Greg Stitt; Naren Vikram Raj Masna; Aritra Dasgupta 002; Swarup Bhunia; Nij Dorairaj; David Kehlet (VTS, 2023)

Low-Latency, Line-Rate Variable-Length Field Parsing for 100+ Gb/s Ethernet. - Greg Stitt; Wesley Piard; Christopher Crary (FPGA, 2024)

Novel Toolset for Efficient Hardwired Micro-Op Translation in Embedded Microarchitectures. - Kevin J. Phillipson; Michael G. Rywalt; Baibhab Chatterjee; Eric M. Schwartz; Greg Stitt (IEEE Embed. Syst. Lett., 2024)

Using FPGA devices to accelerate the evaluation phase of tree-based genetic programming: an extended analysis. - Christopher Crary; Wesley Piard; Greg Stitt; Benjamin M. Hicks; Caleb Bean; Bogdan Burlacu; Wolfgang Banzhaf (Genet. Program. Evolvable Mach., 2025)