A process independent ESD design methodology. - Joseph C. Bernier; Gregg D. Croft; W. R. Young (ISCAS (1), 1999)

An improved experimental setup for electrostatic discharge (ESD) measurements based on transmission line pulsing technique. - Jui-Chu Lee; R. Young; Juin J. Liou; Gregg D. Croft; Joseph C. Bernier (IEEE Trans. Instrum. Meas., 2001)

Implementation of a comprehensive and robust MOSFET model in cadence SPICE for ESD applications. - Xiaofang Gao; Juin J. Liou; Joe Bernier; Gregg D. Croft; Adelmo Ortiz-Conde (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Optimization of on-chip ESD protection structures for minimal parasitic capacitance. - Xiaofang Gao; Juin J. Liou; Joe Bernier; Gregg D. Croft; Waisum Wong; Satya Vishwanathan (Microelectron. Reliab., 2003)