167 MHz Radix-8 Divide and Square Root Using Overlapped Radix-2 Stages. - J. Arjun Prabhu; Gregory B. Zyner (IEEE Symposium on Computer Arithmetic, 1995)

167 MHz Radix-4 Floating Point Multiplier. - Robert K. Yu; Gregory B. Zyner (IEEE Symposium on Computer Arithmetic, 1995)

UltraSPARC: The Next Generation Superscalar 64-bit SPARC. - Dale Greenley; J. Bauman; D. Chang; Dennis Chen; R. Eltejaein; Philip A. Ferolito; P. Fu; Robert B. Garner; D. Greenhill; H. Grewal; Kalon Holdbrook; B. Kim; et al. (COMPCON, 1995)

The Visual Instruction Set (VIS) in UltraSPARC. - Leslie Kohn; Guillermo Maturana; Marc Tremblay; A. Prabhu; Gregory B. Zyner (COMPCON, 1995)

CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc. - A. Cao; A. Adalal; J. Bauman; P. Delisle; P. Dedood; P. Donehue; M. Dell'OcaKhouja; T. Doan; Manjunath Doreswamy; Philip A. Ferolito; O. Geva; D. Greenhill; et al. (DAC, 1995)

Prototyping for the Concurrent Development. - Ludovico de Souza; Philip J. Ryan; Jason Crawford; Kevin Wong; Gregory B. Zyner; Tom McDermott (FPL, 2003)