Studies of the quality of GdSiO-Si interface. - Marcin Iwanowicz; Jakub Jasinski; Grzegorz Gluszko; Lidia Lukasiak; Andrzej Jakubowski; Heinrich Gottlob; Mathias Schmidt (Microelectron. Reliab., 2011)

A simple method for extraction of threshold voltage of FD SOI MOSFETs. - Grzegorz Gluszko; Daniel Tomaszewski; Jolanta Malesinska; Krzysztof Kucharski (MIXDES, 2013)

A simple multi-purpose method for compact model evaluation. - Daniel Tomaszewski; Grzegorz Gluszko; Michal Zaborowski; Jolanta Malesinska; Krzysztof Kucharski (MIXDES, 2014)

Simple methods of threshold voltage parameter extraction for MOSFET models. - Daniel Tomaszewski; Jolanta Malesinska; Grzegorz Gluszko (MIXDES, 2015)

FOSS as an efficient tool for extraction of MOSFET compact model parameters. - Daniel Tomaszewski; Grzegorz Gluszko; Mike Brinson; Vadim Kuznetsov; Wladek Grabinski (MIXDES, 2016)

Electrical characterization of different types of transistors fabricated in VeSTIC process. - Grzegorz Gluszko; Daniel Tomaszewski; Krzysztof Domanski (MIXDES, 2017)

A test structure for characteriation of the shallow piezoresistor-based strain sensors. - Hubert Hara; Grzegorz Gluszko; Daniel Tomaszewski (MIXDES, 2017)

An Effect of Device Topology in VeSTIC Process on Logic Circuit Operation A Study Based on Ring Oscillator Operation Analysis. - Daniel Tomaszewski; Krzysztof Domanski; Grzegorz Gluszko; Andrzej Sierakowski; Dariusz Szmigiel (MIXDES, 2018)

FOSS EKV2.6 Verilog-A Compact MOSFET Model. - Wladek Grabinski; Ahmed Abo-Elhadid; Marek Mierzwinski; Laurent Lemaitre; Mike Brinson; Christophe Lallement; Jean-Michel Sallese; Sadayuki Yoshitomi; Paul Malisse; Henri Oguey; Stefan Cserveny; Marcelo Antonio Pavanello; et al. (ESSDERC, 2019)

Current vs Substrate Bias Characteristics of MOSFETs as a Tool for Parameter Extraction. - Daniel Tomaszewski; Jolanta Malesinska; Grzegorz Gluszko; Krzysztof Kucharski (MIXDES, 2019)