Fast and Low-Memory-Bandwidth Architecture of SIFT Descriptor Generation with Scalability on Speed and Accuracy for VGA Video. - Kosuke Mizuno; Hiroki Noguchi; Guangji He; Yosuke Terachi; Tetsuya Kamino; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (FPL, 2010)

A 40 nm 144 mW VLSI processor for realtime 60 kWord continuous speech recognition. - Guangji He; Takanobu Sugahara; Tsuyoshi Fujinaga; Yuki Miyamoto; Hiroki Noguchi; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (CICC, 2011)

A Low-Power Real-Time SIFT Descriptor Generation Engine for Full-HDTV Video Recognition. - Kosuke Mizuno; Hiroki Noguchi; Guangji He; Yosuke Terachi; Tetsuya Kamino; Tsuyoshi Fujinaga; Shintaro Izumi; Yasuo Ariki; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (IEICE Trans. Electron., 2011)

A 40-nm 168-mW 2.4×-real-time VLSI processor for 60-kWord continuous speech recognition. - Guangji He; Takanobu Sugahara; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (CICC, 2012)

A 40 nm 144 mW VLSI Processor for Real-Time 60-kWord Continuous Speech Recognition. - Guangji He; Takanobu Sugahara; Yuki Miyamoto; Tsuyoshi Fujinaga; Hiroki Noguchi; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A 40-NM 54-MW 3×-real-time VLSI processor for 60-kWord continuous speech recognition. - Guangji He; Yuki Miyamoto; Kumpei Matsuda; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (SiPS, 2013)

A 168-mW 2.4X-Real-Time 60-kWord Continuous Speech Recognition Processor VLSI. - Guangji He; Takanobu Sugahara; Yuki Miyamoto; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (IEICE Trans. Electron., 2013)

A 54-mw 3×-real-time 60-kword continuous speech recognition processor VLSI. - Guangji He; Yuki Miyamoto; Kumpei Matsuda; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (IEICE Electron. Express, 2014)