A fast bootstrapped switch for high-speed high-resolution A/D converter. - Guanzhong Huang; Pingfen Lin (APCCAS, 2010)

A 48-mW, 12-bit, 150-MS/s pipelined ADC with digital calibration in 65nm CMOS. - Bei Peng; Guanzhong Huang; Hao Li 001; Peiyuan Wan; Pingfen Lin (CICC, 2011)

A 5-bit 125-MS/s 367-µW ADC in 65-nm CMOS. - Guanzhong Huang; Pingfen Lin (MWSCAS, 2012)

A 15fJ/conversion-step 8-bit 50 MS/s asynchronous SAR ADC with efficient charge recycling technique. - Guanzhong Huang; Pingfen Lin (Microelectron. J., 2012)

1.1-V, 8-bit, 12 MS/s asynchronous reference-free successive-approximation-register analogue-todigital converter in 0.18 μm CMOS with separated capacitor arrays. - Guanzhong Huang; Pingfen Lin (IET Circuits Devices Syst., 2013)

A TIME-DOMAIN 1.0-V/0.8-MW 6-BIT 125 MS/S FLASH ADC IN 65 NM CMOS. - Guanzhong Huang; Pingfen Lin (J. Circuits Syst. Comput., 2013)

Simplified Volterra series based background calibration for high speed high resolution pipelined ADCs. - Guanzhong Huang; Bei Peng; Anding Zhu (MWSCAS, 2015)

A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter. - Feng-Wei Kuo; Sandro Binsfeld Ferreira; Masoud Babaie; Huan-Neng Ron Chen; Lan-chou Cho; Chewnpu Jou; Fu-Lung Hsueh; Guanzhong Huang; Iman Madadi; Massoud Tohidian; Robert Bogdan Staszewski (VLSI Circuits, 2016)

Analog Assisted Multichannel Digital Postcorrection for Time-Interleaved ADCs. - Guanzhong Huang; Chao Yu 002; Anding Zhu (IEEE Trans. Circuits Syst. II Express Briefs, 2016)