Timing driven placement in interaction with netlist transformations. - Guenter Stenz; Bernhard M. Riess; Bernhard Rohfleisch; Frank M. Johannes (ISPD, 1997)

Technology Mapping for Minimizing Gate and Routing Area. - Aiguo Lu; Guenter Stenz; Frank M. Johannes (DATE, 1998)

Combining technology mapping with post-placement resynthesis for performance optimization. - Aiguo Lu; Hans Eisenmann; Guenter Stenz; Frank M. Johannes (ICCD, 1998)

Performance optimization by interacting netlist transformations andplacement. - Guenter Stenz; Bernhard M. Riess; Bernhard Rohfleisch; Frank M. Johannes (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)