A 2×VDD-enabled fully-integrated low-dropout regulator with fast transient response. - Shuangxing Zhao; Chenchang Zhan; Guigang Cai (VLSI-SoC, 2017)

Analysis and design of a current-mode bandgap reference with high power supply ripple rejection. - Lidan Wang 001; Chenchang Zhan; Junyao Tang; Shuangxing Zhao; Guigang Cai; Yang Liu 061; Qiwei Huang; Guofeng Li (Microelectron. J., 2017)

A 2 × VDD-Enabled Output-Capacitor-Free Low-Dropout Regulator with Fast Transient Response for Low-Cost System-on-Chip. - Shuangxing Zhao; Chenchang Zhan; Guigang Cai (J. Circuits Syst. Comput., 2018)

A Fast-Transient-Response Fully-Integrated Digital LDO With Adaptive Current Step Size Control. - Guigang Cai; Chenchang Zhan; Yan Lu 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Transient-Enhanced Output-Capacitor-Free Low-Dropout Regulator With Dynamic Miller Compensation. - Chenchang Zhan; Guigang Cai; Wing-Hung Ki (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A Battery-Input Sub-1V Output 92.9% Peak Efficiency 0.3A/mm2 Current Density Hybrid SC-Parallel-Inductor Buck Converter with Reduced Inductor Current in 65nm CMOS. - Guigang Cai; Yan Lu 002; Rui Paulo Martins (ISSCC, 2022)

A Compact 12V-to-1V 91.8% Peak Efficiency Hybrid Resonant Switched-Capacitor Parallel Inductor (ReSC-PL) Buck Converter. - Guigang Cai; Yan Lu 002; Rui Paulo Martins (ISSCC, 2023)

A 12V-lnput 1V-1.8V-Output 93.7% Peak Efficiency Dual-Inductor Quad-Path Hybrid DC-DC Converter. - Wen-Liang Zeng; Guigang Cai; Chon-Fai Lee; Chi-Seng Lam; Yan Lu 002; Sai-Weng Sin; Rui Paulo Martins (ISSCC, 2023)

An SC-Parallel-Inductor Hybrid Buck Converter With Reduced Inductor Voltage and Current. - Guigang Cai; Yan Lu 002; Rui Paulo Martins (IEEE J. Solid State Circuits, 2023)

A Resonant Switched-Capacitor Parallel Inductor Hybrid Buck Converter. - Guigang Cai; Rui Paulo Martins; Yan Lu 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

A Dual-Inductor Quad-Path Hybrid Buck (2L4PHB) Converter With Reduced Inductor Current. - Wen-Liang Zeng; Guigang Cai; Yan Lu 002; Sai-Weng Sin; Rui Paulo Martins; Chi-Seng Lam (IEEE J. Solid State Circuits, 2025)