BAT: Performance-Driven Crosstalk Mitigation Based on Bus-Grouping Asynchronous Transmission. - Guihai Yan; Yinhe Han 001; Xiaowei Li 001; Hui Liu (IEICE Trans. Electron., 2008)

M-IVC: Using Multiple Input Vectors to Minimize Aging-Induced Delay. - Song Jin; Yinhe Han 001; Lei Zhang 008; Huawei Li 001; Xiaowei Li 001; Guihai Yan (Asian Test Symposium, 2009)

A unified online Fault Detection scheme via checking of Stability Violation. - Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (DATE, 2009)

MicroFix: exploiting path-grained timing adaptability for improving power-performance efficiency. - Guihai Yan; Yinhe Han 001; Hui Liu; Xiaoyao Liang; Xiaowei Li 001 (ISLPED, 2009)

Variation-Aware Scheduling for Chip Multiprocessors with Thread Level Redundancy. - Jianbo Dong; Lei Zhang 008; Yinhe Han 001; Guihai Yan; Xiaowei Li 001 (PRDC, 2009)

Leveraging the core-level complementary effects of PVT variations to reduce timing emergencies in multi-core processors. - Guihai Yan; Xiaoyao Liang; Yinhe Han 001; Xiaowei Li 001 (ISCA, 2010)

Performance-asymmetry-aware scheduling for Chip Multiprocessors with static core coupling. - Jianbo Dong; Lei Zhang 008; Yinhe Han 001; Guihai Yan; Xiaowei Li 001 (J. Syst. Archit., 2010)

Online timing variation tolerance for digital integrated circuits. - Guihai Yan; Xiaowei Li 001 (ITC, 2011)

ReviveNet: A Self-Adaptive Architecture for Improving Lifetime Reliability via Localized Timing Adaptation. - Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (IEEE Trans. Computers, 2011)

MicroFix: Using timing interpolation and delay sensors for power reduction. - Guihai Yan; Yinhe Han 001; Hui Liu; Xiaoyao Liang; Xiaowei Li 001 (ACM Trans. Design Autom. Electr. Syst., 2011)

SVFD: A Versatile Online Fault Detection Scheme via Checking of Stability Violation. - Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (IEEE Trans. Very Large Scale Integr. Syst., 2011)

AgileRegulator: A hybrid voltage regulator scheme redeeming dark silicon for power efficiency in a multicore architecture. - Guihai Yan; Yingmin Li; Yinhe Han 001; Xiaowei Li 001; Minyi Guo; Xiaoyao Liang (HPCA, 2012)

RISO: relaxed network-on-chip isolation for cloud processors. - Hang Lu; Guihai Yan; Yinhe Han 001; Binzhang Fu; Xiaowei Li 001 (DAC, 2013)

Orchestrator: a low-cost solution to reduce voltage emergencies for multi-threaded applications. - Xing Hu 001; Guihai Yan; Yu Hu 001; Xiaowei Li 001 (DATE, 2013)

SmartCap: user experience-oriented power adaptation for smartphone's application processor. - Xueliang Li 004; Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (DATE, 2013)

Amphisbaena: Modeling two orthogonal ways to hunt on heterogeneous many-cores. - Jun Ma; Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (ASP-DAC, 2014)

On-Chip Delay Sensor for Environments with Large Temperature Fluctuations. - Jibing Qiu; Guihai Yan; Xiaowei Li 001 (ATS, 2014)

SuperRange: Wide operational range power delivery design for both STV and NTV computing. - Xin He; Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (DATE, 2014)

SmartCap: Using Machine Learning for Power Adaptation of Smartphone's Application Processor. - Xueliang Li 004; Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (ACM Trans. Design Autom. Electr. Syst., 2014)

Orchestrator: Guarding Against Voltage Emergencies in Multithreaded Applications. - Xing Hu 001; Guihai Yan; Yu Hu 001; Xiaowei Li 001 (IEEE Trans. Very Large Scale Integr. Syst., 2014)

ShuttleNoC: Boosting on-chip communication efficiency by enabling localized power adaptation. - Hang Lu; Guihai Yan; Yinhe Han 001; Ying Wang 001; Xiaowei Li 001 (ASP-DAC, 2015)

RISO: Enforce Noninterfered Performance With Relaxed Network-on-Chip Isolation in Many-Core Cloud Processors. - Hang Lu; Binzhang Fu; Ying Wang 001; Yinhe Han 001; Guihai Yan; Xiaowei Li 001 (IEEE Trans. Very Large Scale Integr. Syst., 2015)

ACR: Enabling computation reuse for approximate computing. - Xin He; Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (ASP-DAC, 2016)

PowerCap: Leverage Performance-Equivalent Resource Configurations for power capping. - Faqiang Sun; Huawei Li 001; Yinhe Han 001; Guihai Yan; Jun Ma (IGSC, 2016)

Wide Operational Range Processor Power Delivery Design for Both Super-Threshold Voltage and Near-Threshold Voltage Computing. - Xin He; Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (J. Comput. Sci. Technol., 2016)

An Analytical Framework for Estimating Scale-Out and Scale-Up Power Efficiency of Heterogeneous Manycores. - Jun Ma; Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (IEEE Trans. Computers, 2016)

CoreRank: Redeeming "Sick Silicon" by Dynamically Quantifying Core-Level Healthy Condition. - Guihai Yan; Faqiang Sun; Huawei Li 001; Xiaowei Li 001 (IEEE Trans. Computers, 2016)

EcoUp: Towards Economical Datacenter Upgrading. - Guihai Yan; Jun Ma; Yinhe Han 001; Xiaowei Li 001 (IEEE Trans. Parallel Distributed Syst., 2016)

ApproxEye: Enabling approximate computation reuse for microrobotic computer vision. - Xin He; Guihai Yan; Faqiang Sun; Yinhe Han 001; Xiaowei Li 001 (ASP-DAC, 2017)

FlexFlow: A Flexible Dataflow Accelerator Architecture for Convolutional Neural Networks. - Wenyan Lu; Guihai Yan; Jiajun Li; Shijun Gong; Yinhe Han 001; Xiaowei Li 001 (HPCA, 2017)

Exploiting the Potential of Computation Reuse Through Approximate Computing. - Xin He; Shuhao Jiang; Wenyan Lu; Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (IEEE Trans. Multi Scale Comput. Syst., 2017)

PowerTrader: Enforcing Autonomous Power Management for Future Large-Scale Many-Core Processors. - Hang Lu; Guihai Yan; Yinhe Han 001; Xiaowei Li 001 (IEEE Trans. Multi Scale Comput. Syst., 2017)

RiskCap: Minimizing Effort of Error Regulation for Approximate Computing. - Shuhao Jiang; Jiajun Li; Xin He; Guihai Yan; Xuan Zhang 001; Xiaowei Li 001 (ATS, 2018)

CCR: A concise convolution rule for sparse neural network accelerators. - Jiajun Li; Guihai Yan; Wenyan Lu; Shuhao Jiang; Shijun Gong; Jingya Wu; Xiaowei Li 001 (DATE, 2018)

SmartShuttle: Optimizing off-chip memory accesses for deep learning accelerators. - Jiajun Li; Guihai Yan; Wenyan Lu; Shuhao Jiang; Shijun Gong; Jingya Wu; Xiaowei Li 001 (DATE, 2018)

Tetris: re-architecting convolutional neural network computation for machine learning accelerators. - Hang Lu; Xin Wei; Ning Lin; Guihai Yan; Xiaowei Li 001 (ICCAD, 2018)

AxTrain: Hardware-Oriented Neural Network Training for Approximate Inference. - Xin He; Liu Ke 001; Wenyan Lu; Guihai Yan; Xuan Zhang 001 (ISLPED, 2018)

Fault tolerance on-chip: a reliable computing paradigm using self-test, self-diagnosis, and self-repair (3S) approach. - Xiaowei Li 001; Guihai Yan; Jing Ye 001; Ying Wang 001 (Sci. China Inf. Sci., 2018)

Joint Design of Training and Hardware Towards Efficient and Accuracy-Scalable Neural Network Inference. - Xin He; Wenyan Lu; Guihai Yan; Xuan Zhang 001 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2018)

CPicker: Leveraging Performance-Equivalent Configurations to Improve Data Center Energy Efficiency. - Faqiang Sun; Guihai Yan; Xin He; Huawei Li 001; Yinhe Han 001 (J. Comput. Sci. Technol., 2018)

Optimizing Memory Efficiency for Deep Convolutional Neural Network Accelerators. - Xiaowei Li 001; Jiajun Li; Guihai Yan (J. Low Power Electron., 2018)

AdaFlow: Aggressive Convolutional Neural Networks Approximation by Leveraging the Input Variability. - Wenyan Lu; Guihai Yan; Xiaowei Li 001 (J. Low Power Electron., 2018)

TNPU: an efficient accelerator architecture for training convolutional neural networks. - Jiajun Li; Guihai Yan; Wenyan Lu; Shuhao Jiang; Shijun Gong; Jingya Wu; Junchao Yan; Xiaowei Li 001 (ASP-DAC, 2019)

ShuntFlow: An Efficient and Scalable Dataflow Accelerator Architecture for Streaming Applications. - Shijun Gong; Jiajun Li; Wenyan Lu; Guihai Yan; Xiaowei Li 001 (DAC, 2019)

MLA: Machine Learning Adaptation for Realtime Streaming Financial Applications. - Jingya Wu; Wenyan Lu; Guihai Yan; Xiaowei Li 001 (IGSC, 2019)

SqueezeFlow: A Sparse CNN Accelerator Exploiting Concise Convolution Rules. - Jiajun Li; Shuhao Jiang; Shijun Gong; Jingya Wu; Junchao Yan; Guihai Yan; Xiaowei Li 001 (IEEE Trans. Computers, 2019)

Promoting the Harmony between Sparsity and Regularity: A Relaxed Synchronous Architecture for Convolutional Neural Networks. - Wenyan Lu; Guihai Yan; Jiajun Li; Shijun Gong; Shuhao Jiang; Jingya Wu; Xiaowei Li 001 (IEEE Trans. Computers, 2019)

ShuttleNoC: Power-Adaptable Communication Infrastructure for Many-Core Processors. - Hang Lu; Yisong Chang; Guihai Yan; Ning Lin; Xin Wei; Xiaowei Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

SynergyFlow: An Elastic Accelerator Architecture Supporting Batch Processing of Large-Scale Deep Neural Networks. - Jiajun Li; Guihai Yan; Wenyan Lu; Shijun Gong; Shuhao Jiang; Jingya Wu; Xiaowei Li 001 (ACM Trans. Design Autom. Electr. Syst., 2019)

A Quantitative Exploration of Collaborative Pruning and Approximation Computing Towards Energy Efficient Neural Networks. - Xin He; Guihai Yan; Wenyan Lu; Xuan Zhang 001; Liu Ke 001 (IEEE Des. Test, 2020)

BZIP: A compact data memory system for UTXO-based blockchains. - Shuhao Jiang; Jiajun Li; Shijun Gong; Junchao Yan; Guihai Yan; Yi Sun 004; Xiaowei Li 001 (J. Syst. Archit., 2020)

ShuntFlowPlus: An Efficient and Scalable Dataflow Accelerator Architecture for Stream Applications. - Shijun Gong; Jiajun Li; Wenyan Lu; Guihai Yan; Xiaowei Li 001 (ACM J. Emerg. Technol. Comput. Syst., 2021)

Using Psychophysics to Guide Power Adaptation for Input Methods on Mobile Architectures. - Xueliang Li 002; Shicong Hong; Junyang Chen 001; Guihai Yan; Kaishun Wu (HPCA, 2022)

DOE: Database Offloading Engine for Accelerating SQL Processing. - Wenyan Lu; Yan Chen; Jingya Wu; Yu Zhang 027; Xiaowei Li 001; Guihai Yan (ICDE Workshops, 2022)

Portrait: A holistic computation and bandwidth balanced performance evaluation model for heterogeneous systems. - Jingya Wu; Wenyan Lu; Guihai Yan; Xiaowei Li 001 (Sustain. Comput. Informatics Syst., 2022)

Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design - A Self-Test, Self-Diagnosis, and Self-Repair-Based Approach - Xiaowei Li 001; Guihai Yan; Cheng Liu 008 (Springer, 2023)

Co-ViSu: a Video Super-Resolution Accelerator Exploiting Codec Information Reuse. - Haishuang Fan; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (FPL, 2023)

M2VT: A Multi-Output Encoder Accelerator for Multiple-Way Video Transcoding. - Haishuang Fan; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (ACM Great Lakes Symposium on VLSI, 2023)

KPU-SQL: Kernel Processing Unit for High-Performance SQL Acceleration. - Hao Kong; Haishuang Fan; Jingya Wu; Liyun Cheng; Yan Chen; Wenyan Lu; Guihai Yan; Xiaowei Li 001 (ACM Great Lakes Symposium on VLSI, 2023)

Optimize the TX Architecture of RDMA NIC for Performance Isolation in the Cloud Environment. - Yunkun Liao; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (ACM Great Lakes Symposium on VLSI, 2023)

BitColor: Accelerating Large-Scale Graph Coloring on FPGA with Parallel Bit-Wise Engines. - Haishuang Fan; Ming Li; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (ICPP, 2023)

FlatProxy: A DPU-centric Service Mesh Architecture for Hyperscale Cloud-native Application. - Ming Li; Wenyan Lu; Hanyue Lin; Jingya Wu; Yu Zhang 027; Guihai Yan (CoRR, 2023)

DOE: database offloading engine for accelerating SQL processing. - Hao Kong; Wenyan Lu; Yan Chen; Jingya Wu; Yu Zhang 027; Guihai Yan; Xiaowei Li 001 (Distributed Parallel Databases, 2023)

TianMen: a DPU-based storage network offloading structure for disaggregated datacenters. - Weiyue Zhao; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (SoCC, 2024)

Co-Via: A Video Frame Interpolation Accelerator Exploiting Codec Information Reuse. - Haishuang Fan; Qichu Sun; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (DAC, 2024)

PHD: Parallel Huffman Decoder on FPGA for Extreme Performance and Energy Efficiency. - Yunkun Liao; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (DAC, 2024)

Athena: Add More Intelligence to RMT-Based Network Data Plane with Low-Bit Quantization. - Yunkun Liao; Hanyue Lin; Jingya Wu; Wenyan Lu; Huawei Li 001; Xiaowei Li 001; Guihai Yan (Euro-Par (2), 2024)

Efficient RNIC Cache Side-Channel Attack Detection Through DPU-Driven Architecture. - Yunkun Liao; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (Euro-Par (2), 2024)

AMST: Accelerating Large-Scale Graph Minimum Spanning Tree Computation on FPGA. - Haishuang Fan; Rui Meng; Qichu Sun; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (IPDPS, 2024)

DPU-Direct: Unleashing Remote Accelerators via Enhanced RDMA for Disaggregated Datacenters. - Yunkun Liao; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (IEEE Trans. Computers, 2024)

Monocular 3D Multi-Person Pose Estimation for On-Site Joint Flexion Assessment: A Case of Extreme Knee Flexion Detection. - Guihai Yan; Haofeng Yan; Zhidong Yao; Zhongliang Lin; Gang Wang; Changyong Liu; Xincong Yang (Sensors, 2024)

Satisfying Energy-Efficiency Constraints for Mobile Systems. - Xueliang Li 002; Shicong Hong; Junyang Chen 001; Junkai Ji; Chengwen Luo 001; Guihai Yan; Zhibin Yu 001; Jianqiang Li 001 (IEEE Trans. Mob. Comput., 2024)

APTO: Accelerating Serialization-Based Point Cloud Transformers with Position-Aware Pruning. - Qichu Sun; Rui Meng; Haishuang Fan; Fangqiang Ding; Linxi Lu; Jingya Wu; Xiaowei Li 001; Guihai Yan (ASP-DAC, 2025)

FUS: FPGA-based Universal Sketch with homogeneous and heterogeneous memory architectures. - Yunkun Liao; Jingya Wu; Wenyan Lu; Huawei Li 001; Xiaowei Li 001; Guihai Yan (CCF Trans. High Perform. Comput., 2025)

KPU: Kernel Processing Unit for in-Memory Analytical Query Processing. - Jingya Wu; Wenyan Lu; Haishuang Fan; Hao Kong; Xiaowei Li 001; Guihai Yan (IEEE Trans. Computers, 2025)

Co-ViSu: Accelerating Video Super-Resolution With Codec Information Reuse. - Haishuang Fan; Qichu Sun; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)