A Fast-Transient Capacitor-Less Low-Dropout Regulator for Wideband Optical Transceivers. - Han Liu; Guike Li; Jian Liu 021; Nanjian Wu; Liyuan Liu; Yingtao Li; Nan Qi (ICTA, 2021)

A 4×25Gb/s De-Serializer with Baud-Rate Sampling CDR and Standing-Wave Clock Distribution for NIC Optical Interconnects. - Mingyang You; Minjia Chen; Yihong Li; Guike Li; Jian Liu 021; Yong Chen 005; Yingtao Li; Nan Qi (ICTA, 2021)

A 50-Gb/s NRZ Receiver Targeting Low-Latency Multi-Chip Module Optical I/O in 45-nm SOI CMOS. - Yihong Li; Sikai Chen; Yunqi Yang; Qianli Ma; Ming Zhong; Ziyi Lin; Leliang Li; Guike Li; Zhao Zhang 004; Liyuan Liu; Jian Liu 021; Nanjian Wu; et al. (APCCAS, 2022)

A 0.004-mm2 O.7-V 31.654-μW BPSK Demodulator Incorporating Dual-Path Loop Self-Biased PLL. - Yixi Li; Xinyu Shen; Zhaoyu Zhang; Guike Li; Tao Yin; Nan Qi; Jian Liu 021; Nanjian Wu; Liyuan Liu; Yong Chen 005; Zhao Zhang 004 (APCCAS, 2022)

A 0.006-mm26-to-20-Gb/s NRZ Bang-Bang Clock and Data Recovery Circuit With Dual-Path Loop. - Zhaoyu Zhang; Xinyu Shen; Yixi Li; Guike Li; Nan Qi; Jian Liu 021; Nanjian Wu; Liyuan Liu; Yong Chen 005; Zhao Zhang 004 (APCCAS, 2022)

A 224-Gb/s Inverter-Based TIA with Interleaved Active-Feedback and Distributed Peaking in 28-nm CMOS for Silicon Photonic Receivers. - Sikai Chen; Jintao Xue; Leliang Li; Guike Li; Zhao Zhang 004; Jian Liu 021; Liyuan Liu; Binhao Wang; Yingtao Li; Nan Qi (ICTA, 2022)

A 56Gb/s De-serializer with PAM-4 CDR for Chiplet Optical-I/O. - Yunqi Yang; Ming Zhong; Qianli Ma; Ziyi Lin; Leliang Li; Guike Li; Liyuan Liu; Jian Liu 021; Nanjian Wu; Haikun Jia; Xinghui Liu; Nan Qi (ICTA, 2022)

A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR. - Qiwen Liao; Yuguang Zhang; Siyuan Ma; Lei Wang 187; Leliang Li; Guike Li; Zhao Zhang 004; Jian Liu 021; Nanjian Wu; Liyuan Liu; Yong Chen 005; Xi Xiao; et al. (IEEE J. Solid State Circuits, 2022)

Design of a PAM-4 VCSEL-Based Transceiver Front-End for Beyond-400G Short-Reach Optical Interconnects. - Jian He; Donglai Lu; Haiyun Xue; Sikai Chen; Han Liu; Leliang Li; Guike Li; Zhao Zhang 004; Jian Liu 021; Liyuan Liu; Nanjian Wu; Ningmei Yu; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A $ boldsymbol{4} times boldsymbol{112}- mathbf{Gb}/ mathbf{s}$ PAM-4 Silicon-Photonic Transceiver Front-End for Linear-Drive Co-Packaged Optics. - Han Liu; Nan Qi; Donglai Lu; Zizheng Dong; Zhihan Zhang; Jian He; Guike Li; Leliang Li; Ye Liu; Ziyue Dang; Daigao Chen; Zhao Zhang 004; et al. (A-SSCC, 2023)

A 4-12.1-GHz Fractional-N Ring Sampling PLL Based on Adaptively-Biased PD-Merged DTC Achieving -37.6± 0.9-dBc Integrated Phase Noise, 261.9-fs RMS Jitter, and -240.6-dB FoM. - Xinyu Shen; Zhao Zhang 004; Guike Li; Yong Chen 005; Nan Qi; Jian Liu 021; Nanjian Wu; Liyuan Liu (ESSCIRC, 2023)

A 0.0035-mm2 0.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE. - Zhaoyu Zhang; Zhao Zhang 004; Yong Chen 005; Guoqing Wang; Xinyu Shen; Nan Qi; Guike Li; Shuangming Yu; Jian Liu 021; Nanjian Wu; Liyuan Liu (ESSCIRC, 2023)

A 400-Gb/s 64-QAM Optical Receiver with Monolithically Integrated TIA and Balanced-PD in 45-nm SOI CMOS. - Yongliang Xiong; Yihao Yang; Qianli Ma; Yangming Ren; Leliang Li; Guike Li; Jian Liu 021; Yingtao Li; Binhao Wang; Nan Qi; Liyuan Liu (ICTA, 2023)

A O.4V-VDD 2.25-to-2.75GHz ULV-SS-PLL Achieving 236.6fsrms Jitter, -253.8dB Jitter-Power FoM, and -76.1dBc Reference Spur. - Zhao Zhang 004; Xinyu Shen; Zhaoyu Zhang; Guike Li; Nan Qi; Jian Liu 021; Yong Chen 005; Nanjian Wu; Liyuan Liu (ISSCC, 2023)

A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O. - Sikai Chen; Mingyang You; Yunqi Yang; Ye Jin; Ziyi Lin; Yihong Li; Leliang Li; Guike Li; Yujun Xie; Zhao Zhang 004; Binhao Wang; Ningfeng Tang; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A 200Gb/s, 3.5pJ/bit Monolithically Integrated WDM SiPhotonic Transceiver for Chiplet Optical I/O. - Qianli Ma; Ang Li; Yongliang Xiong; Yingjie Ma; Haoran Yin; Han Liu; Minye Zhu; Menghan Yang; Ye Jin; Daofa Wang; Peng Wang; Yang Qu; et al. (A-SSCC, 2024)

A 64Gb/s Si-Photonic Micro-Ring Resonator Transceiver with Co-designed CMOS Driver and TIA for WDM Optical-IO. - Qianli Ma; Sikai Chen; Jintao Xue; Yingjie Ma; Yuean Gu; Chao Cheng; Yihan Chen; Haoran Yin; Guike Li; Zhao Zhang 004; Nanjian Wu; Ke Li; et al. (BCICTS, 2024)

A 2λ×100 Gb/s Optical Receiver with Si-Photonic Micro-Ring Resonator and Photo-Detector for DWDM Optical-IO. - Sikai Chen; Jintao Xue; Yihan Chen; Yuean Gu; Haoran Yin; Shenlei Bao; Guike Li; Binhao Wang; Nan Qi (CICC, 2024)

A 0.144 mm212.5-16GHz PVT-Tolerant Dual-Path Offset-Charge-Pump-Based Fractional-N PLL Achieving 72.9 fSRMs Jitter, -271.5dB FoMN, and Sub-10% Jitter Variation. - Xinyu Shen; Zhao Zhang 004; Yong Chen 005; Yixi Li; Yidan Zhang; Guike Li; Nan Qi; Jian Liu 021; Nanjian Wu; Liyuan Liu (CICC, 2024)

A 64-GBaud 64-QAM Optical Coherent Transmitter with Monolithically Integrated Driver and I/Q Modulator in 45-nm SOI CMOS. - Yizhou Xu; Ruogu Deng; Jingbo Wang; Han Liu; Zhihan Zhang; Yihao Yang; Guike Li; Binhao Wang; Nan Qi; Liyuan Liu (ICTA, 2024)

A 32Gb/s NRZ Low-Bias DFB Driver with Frequency Boosting for High Efficiency Data Transmission. - Yang Min; Yi Zhang; Tao Yang; Leliang Li; Guike Li; Zhao Zhang 004; Jian Liu 021; Nanjian Wu; Yonghui Lin; Huiyao Peng; Jingbo Shi; Nan Qi (ISCAS, 2024)

A 4×112 Gb/s PAM-4 Silicon-Photonic Transmitter and Receiver Chipsets for Linear-Drive Co-Packaged Optics. - Han Liu; Zhihan Zhang; Ye Liu; Daigao Chen; Donglai Lu; Jian He; Guike Li; Min Liu; Ziyue Dang; Xi Xiao; Nan Qi (IEEE J. Solid State Circuits, 2024)

A 4λ×128Gb/s PAM-4 Si-Photonic Transmitter with Micro-Ring Modulator and Co-designed Linear Driver for Chiplet Optical I/O. - Siyuan Ma; Yingjie Ma; Chaoyang Dai; Sikai Chen; Qianli Ma; Yihan Chen; Haoran Yin; Yujun Xie; Guike Li; Jian Liu; Ming Li; Liyuan Liu; et al. (OFC, 2025)