A novel SRAM - STT-MRAM hybrid cache implementation improving cache performance. - Odilia Coi; Guillaume Patrigeon; Sophiane Senni; Lionel Torres; Pascal Benoit (NANOARCH, 2017)

FPGA-Based Platform for Fast Accurate Evaluation of Ultra Low Power SoC. - Guillaume Patrigeon; Pascal Benoit; Lionel Torres (PATMOS, 2018)

From Spintronic Devices to Hybrid CMOS/Magnetic System On Chip. - Sophiane Senni; Frederic Ouattara; Jad Mohdad; Kaan Sevin; Guillaume Patrigeon; Pascal Benoit; Pascal Nouet; Lionel Torres; François Duhem; Gregory di Pendina; Guillaume Prenat (VLSI-SoC, 2018)

Edge-Computing Perspectives with Reconfigurable Hardware. - Pascal Benoit; Loic Dalmasso; Guillaume Patrigeon; Thierry Gil; Florent Bruguier; Lionel Torres (ReCoSoC, 2019)

FlexNode: a reconfigurable Internet of Things node for design evaluation. - Guillaume Patrigeon; Paul Leloup; Pascal Benoit; Lionel Torres (SAS, 2019)

Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power Microcontrollers. - Guillaume Patrigeon; Pascal Benoit; Lionel Torres; Sophiane Senni; Guillaume Prenat; Gregory di Pendina (IEEE Access, 2019)

A Universal Spintronic Technology based on Multifunctional Standardized Stack. - Mehdi Baradaran Tahoori; Sarath Mohanachandran Nair; Rajendra Bishnoi; Lionel Torres; Sophiane Senni; Guillaume Patrigeon; Pascal Benoit; Gregory di Pendina; Guillaume Prenat (DATE, 2020)