An Academic RISC-V Silicon Implementation Based on Open-Source Components. - Jaume Abella 001; Calvin Bulla; Guillem Cabo; Francisco J. Cazorla; Adrián Cristal; Max Doblas; Roger Figueras; Alberto González 004; Carles Hernández 001; César Hernández; Víctor Jiménez; Leonidas Kosmidis; et al. (DCIS, 2020)

Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors. - Adrià Armejach; Bine Brank; Jordi Cortina; François Dolique; Timothy Hayes 001; Nam Ho; Pierre-Axel Lagadec; Romain Lemaire; Guillem López-Paradís; Laurent Marliac; Miquel Moretó; Pedro Marcuello; et al. (DATE, 2021)

gem5 + rtl: A Framework to Enable RTL Models Inside a Full-System Simulator. - Guillem López-Paradís; Adrià Armejach; Miquel Moretó (ICPP, 2021)

DVINO: A RISC-V Vector Processor Implemented in 65nm Technology. - Guillem Cabo; Gerard Candón; Xavier Carril; Max Doblas; Marc Domínguez; Alberto González 004; César Hernández; Víctor Jiménez; Vatistas Kostalampros; Rubén Langarita; Neiel Leyva; Guillem López-Paradís; et al. (DCIS, 2022)

Sargantana: A 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI. - Víctor Soria Pardos; Max Doblas; Guillem López-Paradís; Gerard Candón; Narcís Rodas; Xavier Carril; Pau Fontova-Musté; Neiel Leyva; Santiago Marco-Sola; Miquel Moretó (DSD, 2022)

Fast Behavioural RTL Simulation of 10B Transistor SoC Designs with Metro-Mpi. - Guillem López-Paradís; Brian Li; Adrià Armejach; Stefan Wallentowitz; Miquel Moretó; Jonathan Balkind (DATE, 2023)

Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology. - Max Doblas; Gerard Candón; Xavier Carril; Marc Domínguez; Enric Erra; Alberto González 004; César Hernández; Víctor Jiménez; Vatistas Kostalampros; Rubén Langarita; Neiel Leyva; Guillem López-Paradís; et al. (DCIS, 2023)

OpenPiton Optimizations Towards High Performance Manycores. - Neiel Leyva; Alireza Monemi; Noelia Oliete-Escuín; Guillem López-Paradís; Xabier Abancens; Jonathan Balkind; Enrique Vallejo 001; Miquel Moretó; Lluc Alvarez (NoCArc@MICRO, 2023)

Characterization of a Coherent Hardware Accelerator Framework for SoCs. - Guillem López-Paradís; Balaji Venu; Adrià Armejach; Miquel Moretó (SAMOS, 2023)

The Case For Data Centre Hyperloops. - Guillem López-Paradís; Isaac M. Hair; Sid Kannan; Roman Rabbat; Parker Murray; Alex Lopes; Rory Zahedi; Winston Zuo; Jonathan Balkind (ISCA, 2024)

GenArchBench: A genomics benchmark suite for arm HPC processors. - Lorién López-Villellas; Rubén Langarita-Benítez; Asaf Badouh; Víctor Soria Pardos; Quim Aguado-Puig; Guillem López-Paradís; Max Doblas; Javier Setoain; Chulho Kim; Makoto Ono; Adrià Armejach; Santiago Marco-Sola; et al. (Future Gener. Comput. Syst., 2024)

OpenPiton4HPC: Optimizing OpenPiton Toward High-Performance Manycores. - Neiel Leyva; Alireza Monemi; Noelia Oliete-Escuín; Guillem López-Paradís; Xabier Abancens; Jonathan Balkind; Enrique Vallejo 001; Miquel Moretó; Lluc Alvarez (IEEE J. Emerg. Sel. Topics Circuits Syst., 2024)