Design-for-Test Techniques for Opens in Undetected Branches in CMOS Latches and Flip-Flops. - Antonio Zenteno Ramírez; Guillermo Espinosa; Víctor H. Champac (IEEE Trans. Very Large Scale Integr. Syst., 2007)

A robust to PVT fully-differential amplifier in 45nm SOI-CMOS technology. - Andres Amaya; Francisco Villota; Guillermo Espinosa (LASCAS, 2013)

A robust to PVT variations low-voltage low-power current mirror. - Andres Amaya; Guillermo Espinosa; Rodolfo Villamizar (LASCAS, 2014)