Modelling SoC devices for virtual test using VHDL. - Marco Rona; Gunter Krampl (DATE, 2001)

A VHDL-based virtual test concept for pre-silicon test-program debug. - Marco Rona; Gunter Krampl (ETW, 2001)

Test Setup Simulation - A High-Performance VHDL-Based Virtual Test Solution Meeting Industrial Requirements. - Gunter Krampl; Marco Rona; Hermann Tauber (ITC, 2002)

Automating the device interface board modeling for virtual test. - Marco Rona; Gunter Krampl; Fritz Raczkowski (ETW, 2003)