Secure Split-Test for preventing IC piracy by untrusted foundry and assembly. - Gustavo K. Contreras; Md. Tauhidur Rahman 001; Mohammad Tehranipoor (DFTS, 2013)

CSST: Preventing distribution of unlicensed and rejected ICs by untrusted foundry and assembly. - Md. Tauhidur Rahman 001; Domenic Forte; Quihang Shi; Gustavo K. Contreras; Mark Mohammad Tehranipoor (DFT, 2014)

CSST: An Efficient Secure Split-Test for Preventing IC Piracy. - Md. Tauhidur Rahman 001; Domenic Forte; Quihang Shi; Gustavo K. Contreras; Mohammad Tehranipoor (NATW, 2014)

Predictive LBIST model and partial ATPG for seed extraction. - Gustavo K. Contreras; Nisar Ahmed; LeRoy Winemberg; Mark Tehranipoor (DFTS, 2015)

LBIST pattern reduction by learning ATPG test cube properties. - Gustavo K. Contreras; Yang Zhao; Nisar Ahmed; LeRoy Winemberg; Mohammad Tehranipoor (ISQED, 2015)

BIST-RM: BIST-assisted reliability management of SoCs using on-chip clock sweeping and machine learning. - Mehdi Sadi; Gustavo K. Contreras; Dat Tran; Jifeng Chen; LeRoy Winemberg; Mark Tehranipoor (ITC, 2016)

Test-point insertion efficiency analysis for LBIST applications. - Miao Tony He; Gustavo K. Contreras; Mark Tehranipoor; Dat Tran; LeRoy Winemberg (VTS, 2016)

Security vulnerability analysis of design-for-test exploits for asset protection in SoCs. - Gustavo K. Contreras; Adib Nahiyan; Swarup Bhunia; Domenic Forte; Mark Tehranipoor (ASP-DAC, 2017)

Hardware trojan detection through information flow security verification. - Adib Nahiyan; Mehdi Sadi; Rahul Vittal; Gustavo K. Contreras; Domenic Forte; Mark Tehranipoor (ITC, 2017)

Test-Point Insertion Efficiency Analysis for LBIST in High-Assurance Applications. - Miao Tony He; Gustavo K. Contreras; Dat Tran; LeRoy Winemberg; Mark Tehranipoor (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Design of Reliable SoCs With BIST Hardware and Machine Learning. - Mehdi Sadi; Gustavo K. Contreras; Jifeng Chen; LeRoy Winemberg; Mark Tehranipoor (IEEE Trans. Very Large Scale Integr. Syst., 2017)