Physical implementation of an ASIC-oriented SRAM-based viterbi decoder. - Leandro M. G. Rocha; Guilherme Paim; Gustavo M. Santana; Brunno A. Abreu; Rafael Ferreira 001; Eduardo A. C. da Costa; Sergio Bampi (ICECS, 2017)

Using efficient adder compressors with a split-radix butterfly hardware architecture for low-power IoT smart sensors. - Gustavo M. Santana; Guilherme Paim; Leandro M. G. Rocha; Renato Neuenfeld; Mateus Beck Fonseca; Eduardo A. C. da Costa; Sergio Bampi (ICECS, 2017)

Low-Power HEVC 8-point 2-D Discrete Cosine Transform Hardware Using Adder Compressors. - Luis F. Sequeira; Gustavo M. Santana; Guilherme Paim; Leandro M. G. Rocha; Brunno Abreu; Eduardo Costa 001; Sergio Bampi (NEWCAS, 2018)

Exploiting Partial Distortion Elimination in the Sum of Absolute Differences for Energy-Efficient HEVC Integer Motion Estimation. - Brunno Abreu; Gustavo M. Santana; Mateus Grellert; Guilherme Paim; Leandro M. G. Rocha; Eduardo A. C. da Costa; Sergio Bampi (SBCCI, 2018)

Power-, Area-, and Compression-Efficient Eight-Point Approximate 2-D Discrete Tchebichef Transform Hardware Design Combining Truncation Pruning and Efficient Transposition Buffers. - Guilherme Paim; Leandro Mateus Giacomini Rocha; Gustavo Madeira Santana; Leonardo Bandeira Soares; Eduardo Antonio Cesar da Costa; Sergio Bampi (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Exploring high-order adder compressors for power reduction in sum of absolute differences architectures for real-time UHD video encoding. - Guilherme Paim; Gustavo M. Santana; Brunno A. Abreu; Leandro M. G. Rocha; Mateus Grellert; Eduardo A. C. da Costa; Sergio Bampi (J. Real Time Image Process., 2020)

Low-power fast Fourier transform hardware architecture combining a split-radix butterfly and efficient adder compressors. - Guilherme da Costa Ferreira; Guilherme Paim; Leandro M. G. Rocha; Gustavo M. Santana; Renato H. Neuenfeld; Eduardo A. C. da Costa; Sergio Bampi (IET Comput. Digit. Tech., 2021)