A multiple bit upset tolerant SRAM memory. - Gustavo Neuberger; Fernanda Gusmão de Lima Kastensmidt; Luigi Carro; Ricardo Augusto da Luz Reis (ACM Trans. Design Autom. Electr. Syst., 2003)

Designing and testing fault-tolerant techniques for SRAM-based FPGAs. - Fernanda Lima Kastensmidt; Gustavo Neuberger; Luigi Carro; Ricardo Reis 001 (Conf. Computing Frontiers, 2004)

Designing Fault-Tolerant Techniques for SRAM-Based FPGAs. - Fernanda Lima Kastensmidt; Gustavo Neuberger; Renato Fernandes Hentschke; Luigi Carro; Ricardo Reis 001 (IEEE Des. Test Comput., 2004)

TOC-BISR: A Self-Repair Scheme for Memories in Embedded Systems. - Gustavo Neuberger; Fernanda Lima Kastensmidt; Ricardo Reis 001 (IESS, 2005)

An Automatic Technique for Optimizing Reed-Solomon Codes to Improve Fault Tolerance in Memories. - Gustavo Neuberger; Fernanda Gusmão de Lima Kastensmidt; Ricardo Reis 001 (IEEE Des. Test Comput., 2005)

Desenvolvimento de Técnicas de Tolerância à Falhas para Componentes Programáveis por SRAM. - Fernanda Lima Kastensmidt; Gustavo Neuberger; Luigi Carro; Ricardo Reis 001 (RITA, 2005)

Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies. - Gustavo Neuberger; Fernanda Gusmão de Lima Kastensmidt; Ricardo Reis 001; Gilson I. Wirth; Ralf Brederlow; Christian Pacha (VLSI-SoC, 2007)

Statistical Analysis of Normality of Systematic and Random Variability of Flip-Flop Race Immunity in 130nm and 90nm CMOS Technologies. - Gustavo Neuberger; Gilson I. Wirth; Fernanda Gusmão de Lima Kastensmidt; Ricardo Reis 001 (VLSI-SoC (Selected Papers), 2007)

Protecting digital circuits against hold time violation due to process variability. - Gustavo Neuberger; Gilson I. Wirth; Ricardo Reis 001 (SBCCI, 2009)

Functional verification of logic modules for a Gigabit Ethernet switch. - Jorge L. Tonfat; Gustavo Neuberger; Ricardo Reis 001 (LATW, 2011)