Projet SOCRATE - (8) Structure d'un système d'exploitation adapté à la base de données. - Guy Mazaré (1973)

A Few Examples of How to Use a Symmetrical Multi-Micro-Processor. - Guy Mazaré (ISCA, 1977)

A design methodology based upon symbolic layout and integrated cad tools. - A. M. Beyls; B. Hennion; Jacques Lecourvoisier; Guy Mazaré; Alain Puissochet (DAC, 1982)

Computer Aided Design and Artificial Intelligence (Panel). - Guy Mazaré (IFIP Congress, 1986)

An Integrated Highly Parallel Architecture for Image Reconstruction. - Didier Lattard; Guy Mazaré (Advances in Computer Graphics Hardware, 1988)

An Integrated Asynchronous Cellular Array to Do Parallel Image Reconstruction. - Didier Lattard; Guy Mazaré (MVA, 1988)

Massively parallel architecture: application to neural net emulation and image reconstruction. - Didier Lattard; Bernard Faure; Guy Mazaré (ASAP, 1990)

A VLSI Asynchronous Cellular Architecture for Neural Computing: Functional Definition and Performance Evaluation. - Bernard Faure; Guy Mazaré (IEA/AIE (Vol. 2), 1990)

A cellular architecture dedicated to neural net emulation. - Bernard Faure; Guy Mazaré (Microprocessing and Microprogramming, 1990)

A VLSI implementation of parallel image reconstruction. - Didier Lattard; Guy Mazaré (CVGIP Graph. Model. Image Process., 1991)

Functional Testing and Reconfiguration of MIMD Machines. - Chouki Aktouf; Chantal Robach; Guy Mazaré; J. Johansson (DFT, 1993)

RAP: a Fine Grain MIMD Machine. - Chouki Aktouf; Si Mahmoud Karabernou; Youssef Latrous; Guy Mazaré (PARCO, 1993)

Memory testing in a massively parallel machine. - Chouki Aktouf; Chantal Robach; Guy Mazaré (Microprocess. Microprogramming, 1993)

Design and Test of a Massively Parallel Architecture. - Khalid Khoumsi; Chouki Aktouf; Chantal Robach; Guy Mazaré (EUROSIM, 1994)

Fault-Tolerant Routing Algorithms for a Massively Parallel Machine. - Chouki Aktouf; Chantal Robach; Guy Mazaré (ICPP (1), 1994)

Distributing code in a parallel fine grain machine using the actor model. - Youssef Latrous; Guy Mazaré (PDP, 1995)

Toward reconfigurable associative architecture for high speed communication operators. - Ridha Djemal; Guy Mazaré; Gérard Michel (ECBS, 1996)

An Implementation Approach of the IEEE 1149.1 for the Routing Test of a VLSI Massively Parallel Architecture. - Chouki Aktouf; Chantal Robach; A. Marinescu; Guy Mazaré (J. Electron. Test., 1998)

Rapid prototyping of an ATM programmable associative operator. - Ridha Djemal; Guy Mazaré; Rached Tourki (J. Syst. Archit., 2000)