A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC. - Kiduk Kim; Seunghyun Park; Kye-Seok Yoon; Gyeong-Gu Kang; Hyun-Ki Han; Ji-Su Choi; Min-Woo Ko; Jeong-Hyun Cho; Sangjin Lim; Hyung-Min Lee; Hyunsik Kim; Kwyro Lee; et al. (ISSCC, 2018)

A 97% high-efficiency 6μs fast-recovery-time buck-based step-up/down converter with embedded 1/2 and 3/2 charge-pumps for li-lon battery management. - Min-Woo Ko; Kiduk Kim; Young-Jin Woo; Se-Un Shin; Hyun-Ki Han; Yeunhee Huh; Gyeong-Gu Kang; Jeong-Hyun Cho; Sang-Jin Lim; Se-Hong Park; Hyung-Min Lee; Gyu-Hyeong Cho (ISSCC, 2018)

11.8 A 96.8%-Efficiency Continuous Input/Output-Current Step-Up/Down Converter Powering Disposable IoTs with Reconfigurable Multi-Cell-Balanced Alkaline Batteries. - Min-Woo Ko; Gyeong-Gu Kang; Ki-Duk Kim; Ji-Hun Lee; Seok-Tae Koh; Tae-Hwang Kong; Sang-Ho Kim; Sungyong Lee; Michael Choi; Jongshin Shin; Gyu-Hyeong Cho; Hyunsik Kim (ISSCC, 2020)

An 8Ω, 1.4W, 0.0024% THD+N Class-D Audio Amplifier with Bridge-Tied Load Half-Side Switching Mode Achieving Low Standby Quiescent Current of 660μA. - Ji-Hun Lee; Gyeong-Gu Kang; Min-Woo Ko; Gyu-Hyeong Cho; Hyun-Sik Kim (VLSI Circuits, 2020)

A 5V Dynamic Class-C Paralleled Single-Stage Amplifier with Near-Zero Dead-Zone Control and Current-Redistributive Rail-to-Rail Gm-Boosting Technique. - Seok-Tae Koh; Ji-Hun Lee; Gyeong-Gu Kang; Hyun-Ki Han; Hyun-Sik Kim (ISSCC, 2021)

A 12-Bit Mobile OLED/μLED Display Driver IC with Cascaded Loading-Free Capacitive Interpolation DAC and 6.24V/μs-Slew-Rate Buffer Amplifier. - Gyeong-Gu Kang; Seok-Tae Koh; Woojin Jang; Jiho Lee; Seongjoo Lee; Ohjo Kwon; Keumdong Jung; Hyun-Sik Kim (VLSI Circuits, 2021)

A 4.5V-Input 0.3-to-1.7V-Output Step-Down Always-Dual-Path DC-DC Converter Achieving 91.5%-Efficiency with 250mΩ-DCR Inductor for Low-Voltage SoCs. - Jae-Young Ko; Yeunhee Huh; Min-Woo Ko; Gyeong-Gu Kang; Gyu-Hyeong Cho; Hyun-Sik Kim (VLSI Circuits, 2021)

A 96.6%-Efficiency Continuous-Input-Current Hybrid Dual-Path Buck-Boost Converter with Single-Mode Operation and Non-Stopping Output Current Delivery. - Hongseok Shin; Doojin Jang; Gyeong-Gu Kang; Jinuk Kim; Chul Kim; Sohmyung Ha; Minkyu Je (VLSI Circuits, 2021)

A 5-V Dynamic Class-C Paralleled Single-Stage Amplifier With Near-Zero Dead-Zone Control and Current-Redistributive Rail-to-Rail Gm-Boosting Technique. - Seok-Tae Koh; Ji-Hun Lee; Gyeong-Gu Kang; Hyun-Ki Han; Hyun-Sik Kim (IEEE J. Solid State Circuits, 2021)

A Pipeline ADC with Negative C-assisted SC Amplifier Canceling Gain Error and Nonlinearity. - Woojin Jang; Gyeong-Gu Kang; Yong Lim; Hyun-Sik Kim (ESSCIRC, 2022)

A 130V Triboelectric Energy-Harvesting Interface in .18µm BCD with Scalable Multi-Chip-Stacked Bias-Flip and Daisy-Chained Synchronous Signaling Technique. - Jiho Lee; Sang-Han Lee; Gyeong-Gu Kang; Jae-Hyun Kim; Gyu-Hyeong Cho; Hyun-Sik Kim (ISSCC, 2022)

A 10b Source-Driver IC with LSB-Stacked LV-to-HV-Amplify DAC Achieving 2688μm2/channel and 4.8mV DVO for Mobile OLED Displays. - Gyu-Wan Lim; Gyeong-Gu Kang; Hyunggun Ma; Moonjae Jeong; Hyun-Sik Kim (ISSCC, 2022)

A 97.6%-Efficient 1-2MHz Hysteretic Buck Converter with 7V/μs DVS-Rate Enabled by Isosceles-Triangular Shunt Current Push-Pull Technique. - Hong-Hyun Bae; Jeong-Hyun Cho; Gyeong-Gu Kang; Yousung Park; Hyun-Sik Kim (VLSI Technology and Circuits, 2022)

A Monolithic 48V-to-1V 10A Quadruple Step-Down DC-DC Converter with Hysteretic Copied On-Time 4-Phase Control and 2× Slew Rate All-Hysteretic Mode. - Hyun-Ki Han; Min-Woo Ko; Jeong-Hyun Cho; Gyeong-Gu Kang; Seok-Tae Koh; Hong-Hyun Bae; Hyun-Sik Kim (VLSI Technology and Circuits, 2022)

A 5.6W-Power 96.6%-Efficiency Boost-Oriented SIDO Step-Up/Down DC-DC Converter Embedding Buck Conversion with an Energy-Balancing Capacitor. - Gyeong-Gu Kang; Ji-Hun Lee; Se-Un Shin; Gyu-Hyeong Cho; Hyun-Sik Kim (VLSI Technology and Circuits, 2022)

A Triboelectric Energy-Harvesting Interface With Scalable Multi-Chip-Stacked Bias-Flip and Daisy-Chained Synchronous Signaling Techniques. - Jiho Lee; Sang-Han Lee; Gyeong-Gu Kang; Jae-Hyun Kim; Gyu-Hyeong Cho; Hyun-Sik Kim (IEEE J. Solid State Circuits, 2022)

A Mobile OLED Source-Driver IC featuring Ultra-Compact 3-Stage-Cascaded 10-Bit DAC and 42V/μs-Slew-Rate True-DC-Interpolative Super-OTA Buffer. - Seunghwa Shin; Gyeong-Gu Kang; Gyu-Wan Lim; Hyun-Sik Kim (VLSI Technology and Circuits, 2023)

An Area-Efficient 10-Bit Source-Driver IC With LSB-Stacked LV-to-HV-Amplify DAC for Mobile OLED Displays. - Gyu-Wan Lim; Gyeong-Gu Kang; Hyunggun Ma; Moonjae Jeong; Hyun-Sik Kim (IEEE J. Solid State Circuits, 2023)

26.1 A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5μs Suitable for 240Hz-Frame-Rate Mobile Displays. - Yousung Park; Gyeong-Gu Kang; Gyu-Wan Lim; Seunghwa Shin; Yong-Sung Ahn; Wonyoun Kim; Hyun-Sik Kim (ISSCC, 2024)

An OLED Display Driver IC Embedding -63dB CMR, 80mV/nA Sensitivity, 390pA Detectable, and Column-Parallel Pixel Current Readout for Real-Time Non-Uniformity Compensation. - Gyu-Wan Lim; Gyeong-Gu Kang; Seunghwa Shin; Kihyun Kim; Yousung Park; Won Kim; Young-Bok Kim; Hyun-Kyu Jeon; Hyun-Sik Kim (VLSI Technology and Circuits, 2024)

A Display Source-Driver IC Featuring Multistage-Cascaded 10-Bit DAC and True-DC-Interpolative Super-OTA Buffer. - Seunghwa Shin; Gyeong-Gu Kang; Gyu-Wan Lim; Hyun-Sik Kim (IEEE J. Solid State Circuits, 2024)

A 10-bit Source-Driver IC With Charge-Modulation DAC for Enhanced Frame-Rate Mobile OLED Displays. - Yousung Park; Gyeong-Gu Kang; Gyu-Wan Lim; Seunghwa Shin; Yong-Sung Ahn; Wonyoun Kim; Hyun-Sik Kim (IEEE J. Solid State Circuits, 2024)

A 5V-Input, 12.5-to-45V-Output Reconfigurable Hybrid Boost Converter with an SC-Based Parallel Auxiliary Cell Achieving 96.8% Peak Efficiency. - Gyeong-Gu Kang; Minjie Chen; Hyun-Sik Kim (CICC, 2025)

A Column-Parallel On-Programming Pixel-Current Readout Embedded in an OLED Display Driver IC. - Gyu-Wan Lim; Dong-Kyu Kim; Gyeong-Gu Kang; Seunghwa Shin; Kihyun Kim; Yousung Park; Won Kim; Young-Bok Kim; Hyun-Kyu Jeon; Hyun-Sik Kim (IEEE J. Solid State Circuits, 2025)