ALMP: A Shifting Memory Architecture for Loop Pipelining. - H. Fatih Ugurdag; Christos A. Papachristou (ICCD, 1992)

A VLIW architecture based on shifting register files. - H. Fatih Ugurdag; Christos A. Papachristou (MICRO, 1993)

Autocircuit: a clock edge general behavioral synthesis system with a direct path to physical datapath. - H. Fatih Ugurdag; Thomas E. Fuhrman (ICCD, 1996)

Population-Based FPGA Solution to Mastermind Game. - H. Fatih Ugurdag; Yahya Sahin; Onur Baskirt; Soner Dedeoglu; Sezer Gören 001; Yasar S. Kocak (AHS, 2006)

Defect-aware nanocrossbar logic mapping using Bipartite Subgraph Isomorphism & canonization. - Sezer Gören 001; H. Fatih Ugurdag; Okan Palaz (ETS, 2010)

FPGA design security with time division multiplexed PUFs. - Sezer Gören 001; H. Fatih Ugurdag; Abdullah Yildiz; Ozgur Ozkurt (HPCS, 2010)

Defect-Tolerant Logic Mapping for Nanocrossbars Based on Two-Dimensional Sort. - Sezer Gören 001; H. Fatih Ugurdag; Okan Palaz (ISCIS, 2010)

Gravitational pose estimation. - H. Fatih Ugurdag; Sezer Gören 001; Ferhat Canbay (Comput. Electr. Eng., 2010)

RoCoCo: Row and Column Compression for high-performance multiplication on FPGAs. - H. Fatih Ugurdag; Okan Keskin; Cihan Tunc; Fatih Temizkan; Gurbey Fici; Soner Dedeoglu (EWDTS, 2011)

FPGA bitstream protection with PUFs, obfuscation, and multi-boot. - Sezer Gören 001; Ozgur Ozkurt; Abdullah Yildiz; H. Fatih Ugurdag (ReCoSoC, 2011)

Defect-Aware Nanocrossbar Logic Mapping through Matrix Canonization Using Two-Dimensional Radix Sort. - Sezer Gören 001; H. Fatih Ugurdag; Okan Palaz (ACM J. Emerg. Technol. Comput. Syst., 2011)

FPGA Based Particle Identification in High Energy Physics Experiments. - H. Fatih Ugurdag; Ali Basaran; Taylan Akdogan; V. Ugur Güney; Sezer Gören 001 (ASAP, 2012)

Ultra-fast curve fitting for pulses on FPGA. - Ali Basaran; H. Fatih Ugurdag; Taylan Akdogan; V. Ugur Güney; Sezer Gören 001 (SIU, 2012)

Fast parallel prefix logic circuits for n2n round-robin arbitration. - H. Fatih Ugurdag; Onur Baskirt (Microelectron. J., 2012)

A Fast Circuit Topology for Finding the Maximum of N k-bit Numbers. - Bilgiday Yuce; H. Fatih Ugurdag; Sezer Gören 001; Günhan Dündar (IEEE Symposium on Computer Arithmetic, 2013)

Experiences on the road from EDA developer to designer to educator. - H. Fatih Ugurdag (EWDTS, 2013)

Synthesis of clock trees for Sampled-Data Analog IC blocks. - Bilgiday Yuce; Seyrani Korkmaz; Vahap Baris Esen; Fatih Temizkan; Cihan Tunc; Gokhan Guner; I. Faik Baskaya; Iskender Agi; Günhan Dündar; H. Fatih Ugurdag (EWDTS, 2013)

Achieving modular dynamic partial reconfiguration with a difference-based flow (abstract only). - Sezer Gören 001; Yusuf Turk; Ozgur Ozkurt; Abdullah Yildiz; H. Fatih Ugurdag (FPGA, 2013)

Enabling difference-based dynamic partial self reconfiguration for large differences. - Sezer Gören 001; Ozgur Ozkurt; Yusuf Turk; Abdullah Yildiz; H. Fatih Ugurdag (IDT, 2013)

Generating fast logic circuits for m-select n-port Round Robin Arbitration. - H. Fatih Ugurdag; Fatih Temizkan; Sezer Gören 001 (VLSI-SoC, 2013)

Partial bitstream protection for low-cost FPGAs with physical unclonable function, obfuscation, and dynamic partial self reconfiguration. - Sezer Gören 001; Ozgur Ozkurt; Abdullah Yildiz; H. Fatih Ugurdag; Rajat Subhra Chakraborty; Debdeep Mukhopadhyay (Comput. Electr. Eng., 2013)

Combined AES + AEGIS Architectures for High Performance and Lightweight Security Applications. - Furkan Sahin; H. Fatih Ugurdag; Tolga Yalçin (ICT Innovations, 2014)

A new method for no-reference image Blockiness measurement. - Koray Ozansoy; Nuri Ozer; Faruk Donmez; H. Fatih Ugurdag (SIU, 2014)

Fast and Efficient Circuit Topologies forFinding the Maximum of n k-Bit Numbers. - Bilgiday Yuce; H. Fatih Ugurdag; Sezer Gören 001; Günhan Dündar (IEEE Trans. Computers, 2014)

An area efficient real time implementation of dual tree complex wavelet transform in field programmable gate arrays. - Ferhat Canbay; Vecdi Emre Levent; Gorkem Serbes; H. Fatih Ugurdag; Sezer Gören 001; Nizamettin Aydin (BIBE, 2015)

Software defined VLC system: Implementation and performance evaluation. - Waqas Hussain; H. Fatih Ugurdag; Murat Uysal (IWOW, 2015)

Efficient Combinational Circuits for Division by Small Integer Constants. - H. Fatih Ugurdag; Anil Bayram; Vecdi Emre Levent; Sezer Gören 001 (ARITH, 2016)

Using high-level synthesis for rapid design of video processing pipes. - Aydin Emre Guzel; Vecdi Emre Levent; Mustafa Tosun; M. Akif Ozkan; Toygar Akgün; Duygu Buyukaydin; Cengiz Erbas; H. Fatih Ugurdag (EWDTS, 2016)

Fast one- and two-pick fixed-priority selection and muxing circuits. - Mustafa Tosun; M. Akif Ozkan; Aydin Emre Guzel; H. Fatih Ugurdag (EWDTS, 2016)

Output Domain Downscaler. - Mert Büyükmihçi; Vecdi Emre Levent; Aydin Emre Guzel; Özgür Ates; Mustafa Tosun; Toygar Akgün; Cengiz Erbas; Sezer Gören 001; Hasan Fatih Ugurdag (ISCIS, 2016)

FPGA Implementation of a Dense Optical Flow Algorithm Using Altera OpenCL SDK. - Umut Ulutas; Mustafa Tosun; Vecdi Emre Levent; Duygu Büyükaydin; Toygar Akgün; H. Fatih Ugurdag (ICT Innovations, 2017)

Fast Multiplier Generator for FPGAs with LUT based Partial Product Generation and Column/row Compression. - Ahmet Kakacak; Aydin Emre Guzel; Ozan Cihangir; Sezer Gören 001; H. Fatih Ugurdag (Integr., 2017)

Hardware Division by Small Integer Constants. - H. Fatih Ugurdag; Florent de Dinechin; Y. Serhan Gener; Sezer Gören 001; Laurent-Stéphane Didier (IEEE Trans. Computers, 2017)

RImCom: Raster-order Image Compressor for Embedded Video Applications. - Okan Palaz; H. Fatih Ugurdag; Ozgur Ozkurt; Bugra Kertmen; Faruk Donmez (J. Signal Process. Syst., 2017)

Rapid Design of Real-Time Image Fusion on FPGA using HLS and Other Techniques. - Furkan Aydin; H. Fatih Ugurdag; Vecdi Emre Levent; Aydin Emre Guzel; N. Fajar R. Annafianto; M. Akif Ozkan; Toygar Akgün; Cengiz Erbas (AICCSA, 2018)

25th IFIP/IEEE Conference on Very Large Scale Integration (VLSI-SoC 2017). - Ibrahim Abe M. Elfadel; H. Fatih Ugurdag (IEEE Des. Test, 2018)

Fast and Efficient Implementation of Lightweight Crypto Algorithm PRESENT on FPGA through Processor Instruction Set Extension. - Abdullah Varici; Gurol Saglam; Seckin Ipek; Abdullah Yildiz; Sezer Gören 001; Aydin Aysu; Deniz Iskender; T. Baris Aktemur; H. Fatih Ugurdag (EWDTS, 2019)

Semi- and Fully-Random Access LUTs for Smooth Functions. - Y. Serhan Gener; Furkan Aydin; Sezer Gören 001; H. Fatih Ugurdag (VLSI-SoC (Selected Papers), 2019)

Lossless Look-Up Table Compression for Hardware Implementation of Transcendental Functions. - Y. Serhan Gener; Sezer Gören 001; H. Fatih Ugurdag (VLSI-SoC, 2019)

Tools and Techniques for Implementation of Real-time Video Processing Algorithms. - Vecdi Emre Levent; Aydin Emre Guzel; Mustafa Tosun; Mert Büyükmihçi; Furkan Aydin; Sezer Gören 001; Cengiz Erbas; Toygar Akgün; H. Fatih Ugurdag (J. Signal Process. Syst., 2019)

FPGA Implementation of a Low Latency and High SFDR Direct Digital Synthesizer for Resource-Efficient Quantum-Enhanced Communication. - N. Fajar R. Annafianto; M. V. Jabir; I. A. Burenkov; H. Fatih Ugurdag; Abdella Battou; Sergey V. Polyakov (EWDTS, 2020)

Efficient FPGA Implementation of Field Oriented Control for 3-Phase Machine Drives. - Burak Tufekci; Bugra Onal; Hamza Dere; H. Fatih Ugurdag (EWDTS, 2020)

Fast Incremental Least Square Pose Estimation for Hardware Implementation with Rolling Shutter Camera. - Aydin Emre Güzel; Dilara Hisar; Luc Claesen; H. Fatih Ugurdag (SIU, 2020)

Deep Compression for PyTorch Model Deployment on Microcontrollers. - Eren Dogan; H. Fatih Ugurdag; Hasan Unlu (CoRR, 2021)

ACTreS: Analog Clock Tree Synthesis. - Bilgiday Yuce; H. Fatih Ugurdag; Iskender Agi; Gokhan Guner; Vahap Baris Esen; Seyrani Korkmaz; I. Faik Baskaya; Günhan Dündar (CoRR, 2021)

HC-FFT: highly configurable and efficient FFT implementation on FPGA. - Pakize Ergül; H. Fatih Ugurdag; Dogancan Davutoglu (Turkish J. Electr. Eng. Comput. Sci., 2021)

Using Deep Compression on PyTorch Models for Autonomous Systems. - Eren Dogan; H. Fatih Ugurdag; Hasan Unlu (SIU, 2022)

HM-Net: A Regression Network for Object Center Detection and Tracking on Wide Area Motion Imagery. - Hakki Motorcu; Hasan F. Ates; H. Fatih Ugurdag; Bahadir K. Gunturk (IEEE Access, 2022)

PyTorch and CEDR: Enabling Deployment of Machine Learning Models on Heterogeneous Computing Systems. - Hasan Umut Suluhan; Serhan Gener; Alexander Fusco; H. Fatih Ugurdag; Ali Akoglu (AICCSA, 2023)

2CIM: Area-Efficient 2-Cycle Integer Multipliers. - Ahmad Houraniah; H. Fatih Ugurdag; Cengiz Emre Dedeagac (CoRR, 2023)

JugglePAC: A Pipelined Accumulation Circuit. - Ahmad Houraniah; H. Fatih Ugurdag; Furkan Aydin (CoRR, 2023)

An efficient algorithm for disparity map compression based on spatial correlations and its low-cost hardware architecture. - Mustafa Ghanim; Ozgur Tasdizen; H. Fatih Ugurdag; Ilker Hamzaoglu (Integr., 2023)

NOVLI-ISA: A Novel Optimized Variable-Length Inclusive Instruction Set Architecture for RV32I/E Architecture. - Amer Dyab; H. Fatih Ugurdag (EWDTS, 2024)

A Guided-Ensembling Approach for Cell Counting in Fluorescence Microscopy Images. - Cengiz Emre Dedeagac; Can Koyuncu 001; Michelle M. Adams; Çagatay Edemen; Berk C. Ugurdag; N. Ilgim Ardic-Avci; H. Fatih Ugurdag (IEEE Access, 2024)

X2V: 3D Organ Volume Reconstruction From a Planar X-Ray Image With Neural Implicit Methods. - Gokce Guven; Hasan F. Ates; H. Fatih Ugurdag (IEEE Access, 2024)

Efficient Multi-Cycle Folded Integer Multipliers. - Ahmad Houraniah; H. Fatih Ugurdag; Cengiz Emre Dedeagac (ISVLSI, 2025)

X2BR: High-Fidelity 3D Bone Reconstruction from a Planar X-Ray Image with Hybrid Neural Implicit Methods. - Gokce Guven; H. Fatih Ugurdag; Hasan F. Ates (CoRR, 2025)