A New String Search Hardware Architecture for VLSI. - K. Takahashi; H. Yamada; H. Nagai; K. Matsumi (ISCA, 1986)

Implementing resistive fuse with floating gate MOS transistors. - T. Sawaji; Takeyasu Sakai; H. Nagai; T. Kunishima; Takashi Matsumoto 001 (ICNN, 1997)

A Floating Gate MOS Implementation of Resistive Fuse. - Takashi Matsumoto 001; T. Sawaji; Takeyasu Sakai; H. Nagai (Neural Comput., 1998)

Risk-sensitive portfolio optimization with partial information. - H. Nagai (CDC, 2000)

Design and Verification of Large-Scale Optical Circuit Switch Using ULCF AWGs for Datacenter Application. - H. Nagai; Yojiro Mori; Hiroshi Hasegawa; Ken-ichi Sato (JOCN, 2018)

Up to 57% Reduction in Effective Resistivity of Word Lines of 3D-NAND Memory by Grain-Size Control, Material Selection, and Seam Removal. - H. Terada; K. Yamaguchi; T. Yokoi; T. Sameshima; K. Suzuki; G. Nakamura; H. Nagai (VLSI Technology and Circuits, 2024)