Enhancing Last-Level Cache Performance by Block Bypassing and Early Miss Determination. - Haakon Dybdahl; Per Stenström (Asia-Pacific Computer Systems Architecture Conference, 2006)

Cache Write-Back Schemes for Embedded Destructive-Read DRAM. - Haakon Dybdahl; Marius Grannæs; Lasse Natvig (ARCS, 2006)

A Cache-Partitioning Aware Replacement Policy for Chip Multiprocessors. - Haakon Dybdahl; Per Stenström; Lasse Natvig (HiPC, 2006)

Destructive-read in embedded DRAM, impact on power consumption. - Haakon Dybdahl; Per Gunnar Kjeldsberg; Marius Grannæs; Lasse Natvig (J. Embed. Comput., 2006)

An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors. - Haakon Dybdahl; Per Stenström (HPCA, 2007)

An LRU-based replacement algorithm augmented with frequency of access in shared chip-multiprocessor caches. - Haakon Dybdahl; Per Stenström; Lasse Natvig (SIGARCH Comput. Archit. News, 2007)