A 4 × 32 Gb/s 1.8 pJ/bit Collaborative Baud-Rate CDR With Background Eye-Climbing Algorithm and Low-Power Global Clock Distribution. - Jihee Kim; Jia Park; Jiwon Shin; Hanseok Kim; Kahyun Kim; Haengbeom Shin; Ha-Jung Park; Woo-Seok Choi (IEEE J. Solid State Circuits, 2025)