A 166F2/bit 0.0136%-Native-BER Physically Unclonable Function Based on Gate-Overhang-Shortened Transistor. - Haibiao Zuo; Jiacheng Hao; Jianlin Zhong; Xiaojin Zhao (CICC, 2023)

A 690fJ/Bit ML-Attack-Resilient Strong PUF Based on Subthreshold Voltage Attenuator Ring with Closed-Loop Feedback. - Haotao Lin; Haibiao Zuo; Qiaozhou Peng; Xiaojin Zhao (ESSCIRC, 2023)

A Subthreshold-Inverter-Based Strong PUF with High Reliability and Energy Efficiency. - Qiaozhou Peng; Haibiao Zuo; Jiacheng Hao; Xiaojin Zhao (ISCAS, 2023)

A 3.02 pJ/Bit 3T-APS-Based In-Sensor Strong PUF Featuring Near-100% Hardware Reuse Ratio and High Resilience to Machine Learning Attacks. - Haibiao Zuo; Jiacheng Hao; Haotao Lin; Xiaojin Zhao; Yatao Yang 003; Lei Huang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

An In-Sensor PUF Featuring Optical Reconfigurability and Near-100% Hardware Reuse Ratio for Trustworthy Sensing. - Haibiao Zuo; Xiaoliang Huang; Shiqiao Zhang; Chip-Hong Chang; Xiaojin Zhao (VLSI Technology and Circuits, 2024)

A 1.46-pJ/bit, 149-KF² RO TRNG Based on Reference-RO-Free Thresholding of Jitter Accumulation. - Haibiao Zuo; Qingsen Zhuang; Jiacheng Hao; Haochen Zhong; Xiaojin Zhao (IEEE Trans. Circuits Syst. II Express Briefs, 2025)