Design, measurement and analysis of CMOS polysilicon TFT operational amplifiers. - Hai-Gang Yang; Steve Fluxman; Carlo Reita; Piero Migliorato (IEEE J. Solid State Circuits, 1994)

Impact of capacitor array mismatch in embedded CMOS CR SAR ADC design. - Zengjin Lin; Haigang Yang; Lungui Zhong; Jiabin Sun; Shanhong Xia (Circuits, Signals, and Systems, 2005)

A pH-ISFET Based Micro Sensor System on Chip Using Standard CMOS Technology. - Haigang Yang; Hongguang Sun; Jinghong Han; Jinbao Wei; Zengjin Lin; Shanhong Xia; Hua Zhong (IWSOC, 2005)

Noise Analysis and Simulation of Chopper Amplifier. - Tao Yin; Haigang Yang; Quan Yuan; Guoping Cui (APCCAS, 2006)

"Time borrowing" technique for design of low-power high-speed multi-modulus prescaler in frequency synthesizer. - Quan Yuan; Haigang Yang; Fang-yuan Dong; Tao Yin (ISCAS, 2008)

FPGA based on integration of carbon nanorelays and CMOS devices. - Ming Liu 022; Haigang Yang; Sansiri Tanachutiwat; Wei Wang 003 (NANOARCH, 2009)

Carbon Nanotube Nanorelays with Pass-Transistor for FPGA Routing Devices. - Ming Liu 022; Haigang Yang; Sansiri Tanachutiwat; Wei Wang 003 (NanoNet, 2009)

A 47-dB linear CMOS variable gain amplifier using current squaring technique. - Xin Cheng; Haigang Yang; Tongqiang Gao; Fei Liu 011 (APCCAS, 2010)

Start-up analysis for differential ring oscillator with even number of stages. - Hui Zhang; Haigang Yang; Fei Liu 011; Yuan-feng Wei; Jia Zhang (APCCAS, 2010)

Electrical characterization of RF TSV for 3D multi-core and heterogeneous ICs. - Le Yu; Haigang Yang; Tom T. Jing; Min Xu; Robert E. Geer; Wei Wang 003 (ICCAD, 2010)

Overview: Emerging technologies on giga-scale FPGA implementat. - Hai-Gang Yang (ISCAS, 2010)

A MEMS gyroscope readout circuit with temperature compensation. - Chong Zhang; Qisong Wu; Tao Yin; Haigang Yang (NEMS, 2010)

A matrix approach to low-voltage low-power log-domain CMOS current-mode adjustable-bandwidth step-gain filter design. - Xiaoyu Wang; Haigang Yang; Tao Yin; Fei Liu 011 (ASICON, 2011)

Integrated Gm-C based PI controller for MEMS gyroscope drive loop. - Huanming Wu; Haigang Yang; Xiaoyan Cheng; Tao Yin; Jiwei Jiao (ASICON, 2011)

A TIA-based interface for MEMS capacitive gyroscope. - Tao Yin; Huanming Wu; Qisong Wu; Haigang Yang; Jiwei Jiao (ASICON, 2011)

Current Mode Feed-Forward Gain Control for 0.8V CMOS hearing aid. - Fanyang Li; Haigang Yang; Yu Wang; Qisong Wu (ISCAS, 2011)

A novel low voltage Subtracting BandGap Reference with temperature coefficient of 2.2 ppm/°. - Wen-rui Zhu; Haigang Yang; Tongqiang Gao (ISCAS, 2011)

A TIA-based readout circuit with temperature compensation for MEMS capacitive gyroscope. - Tao Yin; Huanming Wu; Qisong Wu; Haigang Yang; Jiwei Jiao (NEMS, 2011)

Performance evaluation of air-gap-based coaxial RF TSV for 3D NoC. - Le Yu; Haigang Yang; Jia Zhang; Wei Wang 003 (VLSI-SoC, 2011)

Self-test method and recovery mechanism for high frequency TSV array. - Jia Zhang; Le Yu; Haigang Yang; Y. L. Xie; F. B. Zhou; Wei Wang 003 (VLSI-SoC, 2011)

A fast-locking digital DLL with a high resolution time-to-digital converter. - Dandan Zhang; Haigang Yang; Zhujia Chen; Wei Li 008; Zhihong Huang; Lijiang Gao; Wen-rui Zhu (CICC, 2013)

A CMOS Field Programmable Analog Array for intelligent sensory application. - Xiaoyan Cheng; Tao Yin; Qisong Wu; Yiping Jia; Haigang Yang (FPL, 2013)

Timing-constrained minimum area/power FPGA memory mapping. - Fangqing Du; Colin Yu Lin; Xiuhai Cui; Jiabin Sun; Feng Liu; Fei Liu 011; Haigang Yang (FPL, 2013)

High-order reconfigurable FIR filter design based on statistical analysis of CSD coefficients. - Rui Jia; Fei Wang; Rui Chen 014; Xin-Gang Wang; Delong Shang; Hai-Gang Yang (FPT, 2013)

A Range-Extended and Area-Efficient Time-to-Digital Converter Utilizing Ring-Tapped Delay Line. - Xin-Gang Wang; Fei Wang; Rui Jia; Rui Chen 014; Tian Zhi; Hai-Gang Yang (IEICE Trans. Electron., 2013)

Analysis and Design of a 3rd Order Velocity-Controlled Closed-Loop for MEMS Vibratory Gyroscopes. - Huanming Wu; Haigang Yang; Tao Yin; Jiwei Jiao (Sensors, 2013)

A programmable wireless platform for biomedical signal acquisition. - Tao Yin; Fubin Xin; Tongqiang Gao; Guocheng Huang; Haigang Yang (BioCAS, 2014)

A -115dB PSRR CMOS bandgap reference with a novel voltage self-regulating technique. - Yuanming Zhu; Fei Liu 011; Yajuan Yang; Guocheng Huang; Tao Yin; Haigang Yang (CICC, 2014)

Revisiting and-inverter cones. - Grace Zgheib; Liqun Yang; Zhihong Huang; David Novo; Hadi Parandeh-Afshar; Haigang Yang; Paolo Ienne (FPGA, 2014)

A survey of open source processors for FPGAs. - Rui Jia; Colin Yu Lin; Zhenhong Guo; Rui Chen 014; Fei Wang; Tongqiang Gao; Haigang Yang (FPL, 2014)

Exploring architecture parameters for dual-output LUT based FPGAs. - Zhenghong Jiang; Colin Yu Lin; Liqun Yang; Fei Wang; Haigang Yang (FPL, 2014)

A semi-supervised modeling approach for performance characterization of FPGA architectures. - Liqun Yang; Haigang Yang; Wei Li 008; Zhihua Li; Zhihong Huang; Colin Yu Lin (FPL, 2014)

Size aware placement for island style FPGAs. - Junying Huang; Colin Yu Lin; Yang Liu; Zhihua Li; Haigang Yang (FPT, 2014)

A highly-integrated wireless configuration circuit for FPGA chip. - Tongqiang Gao; Xiaodong Xu; Hongfeng Zhang; Haigang Yang (ISIC, 2014)

Successive approximation time-to-digital converter based on vernier charging method. - Xin-Gang Wang; Hai-Gang Yang; Fei Wang; Hui He (IEICE Electron. Express, 2014)

A technology mapper for depth-constrained FPGA logic cells. - Zhenghong Jiang; Grace Zgheib; Colin Yu Lin; David Novo; Zhihong Huang; Liqun Yang; Haigang Yang; Paolo Ienne (FPL, 2015)

A 1.3μW 0.7μVRMS chopper current-reuse instrumentation amplifier for EEG applications. - Guocheng Huang; Tao Yin; Qisong Wu; Yuanming Zhu; Haigang Yang (ISCAS, 2015)

A Multiphase DLL With a Novel Fast-Locking Fine-Code Time-to-Digital Converter. - Dandan Zhang; Hai-Gang Yang; Wen-rui Zhu; Wei Li 008; Zhihong Huang; Lin Li; Tianyi Li 007 (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A 5.8-GHz Wideband TSPC Divide-by-16/17 Dual Modulus Prescaler. - Wen-rui Zhu; Haigang Yang; Tongqiang Gao; Fei Liu 011; Tao Yin; Dandan Zhang; Hongfeng Zhang (IEEE Trans. Very Large Scale Integr. Syst., 2015)

FPGA High-level Synthesis versus Overlay: Comparisons on Computation Kernels. - Colin Yu Lin; Zhenghong Jiang; Cheng Fu; Hayden Kwok-Hay So; Haigang Yang (SIGARCH Comput. Archit. News, 2016)

A Computationally Efficient Reconfigurable FIR Filter Architecture Based on Coefficient Occurrence Probability. - Rui Jia; Hai-Gang Yang; Colin Yu Lin; Rui Chen 014; Xin-Gang Wang; Zhenhong Guo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

NAND-NOR: A Compact, Fast, and Delay Balanced FPGA Logic Element. - Zhihong Huang; Xing Wei; Grace Zgheib; Wei Li 008; Yu Lin; Zhenghong Jiang; Kaihui Tu; Paolo Ienne; Haigang Yang (FPGA, 2017)

A Self-adaptation Method of Fitting Convolutional Neural Network into FPGA: Abstract Only). - Ning Mao; Zhihong Huang; Xing Wei; He Zhao; Xinkai Di; Le Yu; Haigang Yang (FPGA, 2018)

A 0.5 to 1.7 Gbps PI-CDR with a Wide Frequency-Tracking Range. - Tianyi Li 007; Xiaodong Xu; Tao Yin; Fubin Xin; Wei Li 008; Haigang Yang (J. Circuits Syst. Comput., 2018)

A 790 nW Low-Noise Instrumentation Amplifier for Bio-Sensing Based On Gm-RSC Structure. - Tao Yin; Guocheng Huang; Xiaodong Xu; Yachao Zhang; Xinxia Cai; Haigang Yang (J. Circuits Syst. Comput., 2018)

Exploring Resource-Efficient Acceleration Algorithm for Transposed Convolution of GANs on FPGA. - Xinkai Di; Haigang Yang; Zhihong Huang; Ning Mao; Yiping Jia; Yong Zheng 002 (FPT, 2019)

A High Energy-Efficiency FPGA-Based LSTM Accelerator Architecture Design by Structured Pruning and Normalized Linear Quantization. - Yong Zheng 002; Haigang Yang; Zhihong Huang; Tianli Li; Yiping Jia (FPT, 2019)

An Operation-Minimized FPGA Accelerator Design by Dynamically Exploiting Sparsity in CNN Winograd Transform. - Xinkai Di; Haigang Yang; Zhihong Huang; Ning Mao (SoCC, 2019)

A hybrid Sigma-Delta modulator with reusable SAR quantizer. - Tao Yin; Fubin Xin; Fanyang Li; Fei Liu 011; Haigang Yang (IEICE Electron. Express, 2019)

A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition. - Xing Wei; Haigang Yang; Wei Li 008; Zhihong Huang; Tao Yin; Le Yu (Integr., 2019)

A Sub-1 V Temperature-Insensitive-PSR Bandgap Reference with Complementary Loop Locking. - Guocheng Huang; Hai-Gang Yang; Tao Yin; Xiaodong Xu; Yuanming Zhu (J. Circuits Syst. Comput., 2019)

Design and Characterization of SEU Hardened Circuits for SRAM-Based FPGA. - Tianwen Li; Hongjin Liu; Haigang Yang (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A Phase Self-Correction Method for Bias Temperature Drift Suppression of MEMS Gyroscopes. - Tao Yin; Yueshan Lin; Haigang Yang; Huanming Wu (J. Circuits Syst. Comput., 2020)

A 3-6GHz 5-to-512 Multiplier Adaptive Fast-Locking Self-Biased PLL in 28nm CMOS. - Binghui Wang; Haigang Yang; Yiping Jia (ISCAS, 2021)

A Bond-Wire Drift Offset Minimized Capacitance-to-Digital Interface for MEMS Accelerometer with Gain-Enhanced VCO-Based Quantization and Nested Digital Chopping Feedback Loops. - Fanyang Li; Tao Yin; Haigang Yang (Sensors, 2021)

mTREE: A Customized Multicast-Enabled Tree-Based Network on Chip for AI Chips. - Yong Zheng 002; Haigang Yang; Yi Shu; Yiping Jia; Zhihong Huang (IEEE Embed. Syst. Lett., 2022)

Optimizing Off-Chip Memory Access for Deep Neural Network Accelerator. - Yong Zheng 002; Haigang Yang; Yi Shu; Yiping Jia; Zhihong Huang (IEEE Trans. Circuits Syst. II Express Briefs, 2022)