A novel micro-deformation monitoring system for large scale structure. - Tao Wang; Chen Su; Andrew G. Dempster; Haiyong Wu; Hong Zhang; Haisheng Zheng (IGARSS, 2013)

Fluorescence-based temperature sensor for in-situ imaging local temperature of aluminum nanoparticles on plasmonic gratings. - Biyan Chen; Haisheng Zheng; Junsang Yoon; Sangho Bok; Cherian Mathai; Keshab Gangopadhyay; Shubhra Gangopadhyay; Matthew R. Maschmann (IEEE SENSORS, 2016)

A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU. - Wenqian Zhao; Qi Sun 002; Yang Bai; Wenbo Li 002; Haisheng Zheng; Bei Yu 001; Martin D. F. Wong (ICCAD, 2021)

GTuner: tuning DNN computations on GPU via graph attention network. - Qi Sun 002; Xinyun Zhang; Hao Geng; Yuxuan Zhao 001; Yang Bai; Haisheng Zheng; Bei Yu 001 (DAC, 2022)

OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration. - Zhuolun He; Yihang Zuo; Jiaxi Jiang; Haisheng Zheng; Yuzhe Ma; Bei Yu 001 (DAC, 2023)

AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search. - Zehua Pei; Fangzhou Liu; Zhuolun He; Guojin Chen; Haisheng Zheng; Keren Zhu 001; Bei Yu 001 (ICCAD, 2023)

A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU. - Wenqian Zhao; Yang Bai; Qi Sun 002; Wenbo Li 002; Haisheng Zheng; Nianjuan Jiang; Jiangbo Lu; Bei Yu 001; Martin D. F. Wong (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

LSTP: A Logic Synthesis Timing Predictor. - Haisheng Zheng; Zhuolun He; Fangzhou Liu; Zehua Pei; Bei Yu 001 (ASPDAC, 2024)

CBTune: Contextual Bandit Tuning for Logic Synthesis. - Fangzhou Liu; Zehua Pei; Ziyang Yu 001; Haisheng Zheng; Zhuolun He; Tinghuan Chen; Bei Yu 001 (DATE, 2024)

Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks. - Haoyuan Wu; Haisheng Zheng; Zhuolun He; Bei Yu 001 (EMNLP, 2024)

IncreMacro: Incremental Macro Placement Refinement. - Yuan Pu 001; Tinghuan Chen; Zhuolun He; Chen Bai; Haisheng Zheng; Yibo Lin; Bei Yu 001 (ISPD, 2024)

Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks. - Haoyuan Wu; Haisheng Zheng; Bei Yu 001 (CoRR, 2024)

ChatEDA: A Large Language Model Powered Autonomous Agent for EDA. - Haoyuan Wu; Zhuolun He; Xinyun Zhang; Xufeng Yao; Su Zheng; Haisheng Zheng; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Efficient OpAmp Adaptation for Zoom Attention to Golden Contexts. - Haoyuan Wu; Rui Ming; Haisheng Zheng; Zhuolun He; Bei Yu 001 (ACL (1), 2025)

iRw: An Intelligent Rewriting. - Haisheng Zheng; Haoyuan Wu; Zhuolun He; Yuzhe Ma; Bei Yu 001 (DATE, 2025)

Circuit Representation Learning with Masked Gate Modeling and Verilog-AIG Alignment. - Haoyuan Wu; Haisheng Zheng; Yuan Pu 001; Bei Yu 001 (ICLR, 2025)

Divergent Thoughts toward One Goal: LLM-based Multi-Agent Collaboration System for Electronic Design Automation. - Haoyuan Wu; Haisheng Zheng; Zhuolun He; Bei Yu 001 (NAACL (Long Papers), 2025)

Energy performance prediction of centrifugal pumps based on adaptive support vector regression. - Huican Luo; Peijian Zhou; Jiayi Cui; Yang Wang; Haisheng Zheng; Yantian Wang (Eng. Appl. Artif. Intell., 2025)

Architect of the Bits World: Masked Autoregressive Modeling for Circuit Generation Guided by Truth Table. - Haoyuan Wu; Haisheng Zheng; Shoubo Hu; Zhuolun He; Bei Yu 001 (CoRR, 2025)

On-Policy Optimization with Group Equivalent Preference for Multi-Programming Language Understanding. - Haoyuan Wu; Rui Ming; Jilong Gao; Hangyu Zhao; Xueyi Chen; Yikai Yang; Haisheng Zheng; Zhuolun He; Bei Yu 001 (CoRR, 2025)

IncreMacro: Incremental Macro Placement Refinement. - Yuan Pu 001; Tinghuan Chen; Zhuolun He; Jiajun Qin; Chen Bai; Haisheng Zheng; Yibo Lin; Bei Yu 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)