Beyond the limits of classic backscattering communications: A quantum tunneling RFID tag. - Francesco Amato 002; Hakki Mert Torun; Gregory D. Durgin (RFID, 2017)

A Global Bayesian Optimization Algorithm and Its Application to Integrated System Design. - Hakki Mert Torun; Madhavan Swaminathan; Anto Kavungal Davis; Mohamed Lamine Faycal Bellaredj (IEEE Trans. Very Large Scale Integr. Syst., 2018)

RFID Backscattering in Long-Range Scenarios. - Francesco Amato 002; Hakki Mert Torun; Gregory D. Durgin (IEEE Trans. Wirel. Commun., 2018)

Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse. - Jinwoo Kim; Gauthaman Murali; Heechun Park; Eric Qin 001; Hyoukjun Kwon; Venkata Chaitanya Krishna Chekuri; Nihar Dasari; Arvind Singh; Minah Lee; Hakki Mert Torun; Kallol Roy; Madhavan Swaminathan; et al. (DAC, 2019)

A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors. - Hakki Mert Torun; Huan Yu; Nihar Dasari; Venkata Chaitanya Krishna Chekuri; Arvind Singh; Jinwoo Kim; Sung Kyu Lim; Saibal Mukhopadhyay; Madhavan Swaminathan (ICCAD, 2019)

Machine Learning and Uncertainty Quantification for Surrogate Models of Integrated Devices With a Large Number of Parameters. - Riccardo Trinchero; Mourad Larbi; Hakki Mert Torun; Flavio G. Canavero; Madhavan Swaminathan (IEEE Access, 2019)

Heterogeneous integration for artificial intelligence: Challenges and opportunities. - Saibal Mukhopadhyay; Yun Long; Burhan Ahmad Mudassar; C. S. Nair; Bartlet H. DeProspo; Hakki Mert Torun; M. Kathaperumal; V. Smet; Duckhwan Kim 001; Sudhakar Yalamanchili; Madhavan Swaminathan (IBM J. Res. Dev., 2019)

Silicon vs. Organic Interposer: PPA and Reliability Tradeoffs in Heterogeneous 2.5D Chiplet Integration. - Jinwoo Kim; Venkata Chaitanya Krishna Chekuri; Nael Mizanur Rahman; Majid Ahadi Dolatsara; Hakki Mert Torun; Madhavan Swaminathan; Saibal Mukhopadhyay; Sung Kyu Lim (ICCD, 2020)

Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse. - Jinwoo Kim; Gauthaman Murali; Heechun Park; Eric Qin 001; Hyoukjun Kwon; Venkata Chaitanya Krishna Chekuri; Nael Mizanur Rahman; Nihar Dasari; Arvind Singh; Minah Lee; Hakki Mert Torun; Kallol Roy; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options. - Jinwoo Kim; Lingjun Zhu; Hakki Mert Torun; Madhavan Swaminathan; Sung Kyu Lim (DAC, 2021)

Clock Delivery Network Design and Analysis for Interposer-Based 2.5-D Heterogeneous Systems. - Gauthaman Murali; Heechun Park; Eric Qin 001; Hakki Mert Torun; Majid Ahadi Dolatsara; Madhavan Swaminathan; Tushar Krishna; Sung Kyu Lim (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Machine Learning based Design and Optimization for High-Performance Semiconductor Packaging and Systems. - Hakki Mert Torun (2021)

A PPA Study for Heterogeneous 3-D IC Options: Monolithic, Hybrid Bonding, and Microbumping. - Jinwoo Kim; Lingjun Zhu; Hakki Mert Torun; Madhavan Swaminathan; Sung Kyu Lim (IEEE Trans. Very Large Scale Integr. Syst., 2024)