A 1.2 GFLOPS neural network chip for high-speed neural network servers. - Yoshikazu Kondo; Yuichi Koshiba; Yutaka Arima; Mitsuhiro Murasaki; Tuyoshi Yamada; Hiroyuki Amishiro; Hakuro Mori; Kazuo Kyuma (IEEE J. Solid State Circuits, 1996)