A 10Gb/s half-UI IIR-tap transmitter in 40nm CMOS. - Halil Cirit; Marc J. Loinaz (ISSCC, 2011)

3.4 A 40/50/100Gb/s PAM-4 Ethernet transceiver in 28nm CMOS. - Karthik Gopalakrishnan; Alan Ren; Amber Tan; Arash Farhood; Arun Tiruvur; Belal Helal; Chang-Feng Loi; Chris Jiang; Halil Cirit; Irene Quek; Jamal Riani; James Gorecki; et al. (ISSCC, 2016)

Bunch of Wires: An Open Die-to-Die Interface. - Shahab Ardalan; Halil Cirit; Ramin Farjad-Rad; Mark Kuemerle; Ken Poulton; Suresh Subramanian; Bapiraju Vinnakota (Hot Interconnects, 2020)

A 224 Gbit/s Transceiver Front-end Design for Next Generation Data Centers. - Enne Wittenhagen; Urs Hecht; Halil Cirit; Saman Behtash; Srinivas Venkataram; Friedel Gerfers (ICECS 2022, 2022)

PAM-4/6/8 Performance and Power Analysis for Next Generation 224Gbit/s Links. - Urs Hecht; Enne Wittenhagen; Halil Cirit; Saman Behtash; Srinivas Venkataram; Friedel Gerfers (ISCAS, 2022)