A novel variation-aware low-power keeper architecture for wide fan-in dynamic gates. - Hamed F. Dadgour; Rajiv V. Joshi; Kaustav Banerjee (DAC, 2006)

Design and Analysis of Hybrid NEMS-CMOS Circuits for Ultra Low-Power Applications. - Hamed F. Dadgour; Kaustav Banerjee (DAC, 2007)

Statistical modeling of metal-gate work-function variability in emerging device technologies and implications for circuit design. - Hamed F. Dadgour; Vivek De; Kaustav Banerjee (ICCAD, 2008)

Hybrid NEMS-CMOS integrated circuits: A novel strategy for energy-efficient designs. - Hamed F. Dadgour; Kaustav Banerjee (IET Comput. Digit. Tech., 2009)

Design and analysis of compact ultra energy-efficient logic gates using laterally-actuated double-electrode NEMS. - Hamed F. Dadgour; Muhammad Mustafa Hussain; Casey Smith; Kaustav Banerjee (DAC, 2010)

Aging-resilient design of pipelined architectures using novel detection and correction circuits. - Hamed F. Dadgour; Kaustav Banerjee (DATE, 2010)

A new paradigm in the design of energy-efficient digital circuits using laterally-actuated double-gate NEMs. - Hamed F. Dadgour; Muhammad Mustafa Hussain; Kaustav Banerjee (ISLPED, 2010)

A Novel Variation-Tolerant Keeper Architecture for High-Performance Low-Power Wide Fan-In Dynamic or Gates. - Hamed F. Dadgour; Kaustav Banerjee (IEEE Trans. Very Large Scale Integr. Syst., 2010)