Optimizing network efficiency of dataflow architectures through dynamic packet merging. - Yujing Feng; Han Li 011; Xu Tan 001; Xiaochun Ye; Dongrui Fan; Zhimin Tang (IGSC, 2018)

Balancing Memory Accesses for Energy-Efficient Graph Analytics Accelerators. - Mingyu Yan; Xing Hu 001; Shuangchen Li; Itir Akgun; Han Li 011; Xin Ma; Lei Deng 003; Xiaochun Ye; Zhimin Zhang 004; Dongrui Fan; Yuan Xie 001 (ISLPED, 2019)

Alleviating Irregularity in Graph Analytics Acceleration: a Hardware/Software Co-Design Approach. - Mingyu Yan; Xing Hu 001; Shuangchen Li; Abanti Basak; Han Li 011; Xin Ma; Itir Akgun; Yujing Feng; Peng Gu; Lei Deng 003; Xiaochun Ye; Zhimin Zhang 004; et al. (MICRO, 2019)

Hardware Acceleration for GCNs via Bidirectional Fusion. - Han Li 011; Mingyu Yan; Xiaocheng Yang; Lei Deng 003; Wenming Li; Xiaochun Ye; Dongrui Fan; Yuan Xie 001 (IEEE Comput. Archit. Lett., 2021)

Multi-Node Acceleration for Large-Scale GCNs. - Gongjian Sun; Mingyu Yan; Duo Wang; Han Li 011; Wenming Li; Xiaochun Ye; Dongrui Fan; Yuan Xie 001 (IEEE Trans. Computers, 2022)