A 0.87 mW 7MHz-BW 76dB-SNDR passive noise-shaping modulator based on a SAR ADC. - Zhiyuan Dai; Hang Hu 003; Manxin Li; Fan Ye 001; Junyan Ren (ASICON, 2017)

A 320MS/s 7-b flash-SAR ADC with preamplifier sharing technique. - Hang Hu 003; Zhiyuan Dai; Manxin Li; Fan Ye 001; Junyan Ren (ASICON, 2017)

A 15MHz BW continuous-time ΔΣ modulator with high speed digital ELD compensation. - Hang Hu 003; Manxin Li; Zhiyuan Dai; Fan Ye 001; Junyan Ren (ASICON, 2017)

A 12bit asynchronous SAR-incremental sub-range ADC. - Manxin Li; Hang Hu 003; Zhiyuan Dai; Fan Ye 001; Junyan Ren (ASICON, 2017)

A 200MS/s, 11 bit SAR-assisted pipeline ADC with bias-enhanced ring amplifier. - Yongzhen Chen; Jingjing Wang; Hang Hu 003; Fan Ye 001; Junyan Ren (ISCAS, 2017)

High speed digital ELD compensation with hybrid thermometer coding in CT ΔΣ modulators. - Hang Hu 003; Zemin Feng; Chixiao Chen; Fan Ye 001; Junyan Ren (MWSCAS, 2017)

A 12-Bit ENOB 8MHz BW Noise-Shaping SAR ADC Using High-Speed Switches. - Zhiyuan Dai; Hang Hu 003; Yongzhen Chen; Fan Ye 001; Junyan Ren (MWSCAS, 2018)

A Third-order Band-pass Fully-passive Noise-Shaping Modulator Based on a Time-interleaved SAR ADC. - Zhiyuan Dai; Hang Hu 003; Yimin Wu; Fan Ye 001; Junyan Ren (MWSCAS, 2018)

A Time-Interleaved SAR Assisted Pipeline ADC With a Bias-Enhanced Ring Amplifier. - Yongzhen Chen; Jingjing Wang; Hang Hu 003; Fan Ye 001; Junyan Ren (IEEE Trans. Circuits Syst. II Express Briefs, 2018)