A Low-Power Time-to-Digital Converter for the CMS Endcap Timing Layer (ETL) Upgrade. - Wei Zhang; Hanhan Sun; Christopher Edwards; Datao Gong; Xing Huang; Chonghan Liu; Tiankuan Liu; Tiehui Liu 001; Jamieson Olsen; Quan Sun; Xiangming Sun; Jinyuan Wu; et al. (CoRR, 2020)

A 0.024mm2 All-Digital Fractional Output Divider with 257fs Worst-Case Jitter Using Split-DTC-Based Background Calibration. - Yan Yu; Deng Luo; Jianjun Chen; Yang Guo 003; Bin Liang; Yaqing Chi; Hanhan Sun; Jing Xiao; Hao Gao; Ming Tao; Kai Tang (ISSCC, 2025)

Analysis of false lock in Mueller-Muller clock and data recovery system. - Yahao Fang; Deng Luo; Bin Liang; Jianjun Chen; Yaqing Chi; Hanhan Sun; Qian Sun; Jingtian Liu (Integr., 2025)