Testing a RISCV-Like Architecture With an HDL-Based Virtual Tester. - Nooshin Nosrati; Katayoon Basharkhah; Hanieh Totonchi Asl; Zahra Mahdavi; Zainalabedin Navabi (DTIS, 2021)

n-DiCE-LSTM: An n-Dimensional Configurable and Efficient Architecture for LSTM Accelerator. - Mahboobe Sadeghipour Roodsari; Hanieh Totonchi Asl; Zainalabedin Navabi (ISVLSI, 2021)

Multi-Level Fault Injection Methodology Using UVM-SystemC. - Ebrahim Nouri; Nooshin Nosrati; Hanieh Totonchi Asl; Mozhgan Rezaie Manavand; Zainalabedin Navabi (EWDTS, 2023)

Silentflow: Leveraging Trusted Execution for Resource-Limited MPC via Hardware-Algorithm Co-design. - Zhuoran Li; Hanieh Totonchi Asl; Ebrahim Nouri; Yifei Cai; Danella Zhao (CoRR, 2025)