Implementation of Symmetric Algorithms on a Synthesizable 8-Bit Microcontroller Targeting Passive RFID Tags. - Thomas Plos; Hannes Groß; Martin Feldhofer (Selected Areas in Cryptography, 2010)

On Using Instruction-Set Extensions for Minimizing the Hardware-Implementation Costs of Symmetric-Key Algorithms on a Low-Resource Microcontroller. - Hannes Groß; Thomas Plos (RFIDSec, 2012)

PIONEER - a Prototype for the Internet of Things Based on an Extendable EPC Gen2 RFID Tag. - Hannes Groß; Erich Wenger; Honorio Martín; Michael Hutter (RFIDSec, 2014)

Concept for a security aware automatic fare collection system using HF/UHF dual band RFID transponders. - Lukas Zoscher; Jasmin Grosinger 002; Raphael Spreitzer; Ulrich Muehlmann; Hannes Groß; Wolfgang Bösch (ESSDERC, 2015)

Sharing is Caring - On the Protection of Arithmetic Logic Units against Passive Physical Attacks. - Hannes Groß (RFIDSec, 2015)

Privacy-Aware Authentication in the Internet of Things. - Hannes Groß; Marko Hölbl; Daniel Slamanig; Raphael Spreitzer (IACR Cryptol. ePrint Arch., 2015)

Suit up! Made-to-Measure Hardware Implementations of Ascon. - Hannes Groß; Erich Wenger; Christoph Dobraunig; Christoph Ehrenhöfer (IACR Cryptol. ePrint Arch., 2015)

HF/UHF dual band RFID transponders for an information-driven public transportation system. - Lukas Zoscher; Raphael Spreitzer; Hannes Groß; Jasmin Grosinger 002; Ulrich Muehlmann; Dominik Amschl; Hubert Watzinger; Wolfgang Bösch (Elektrotech. Informationstechnik, 2016)

Concealing Secrets in Embedded Processors Designs. - Hannes Groß; Manuel Jelinek; Stefan Mangard; Thomas Unterluggauer; Mario Werner (IACR Cryptol. ePrint Arch., 2016)

Domain-Oriented Masking: Compact Masked Hardware Implementations with Arbitrary Protection Order. - Hannes Groß; Stefan Mangard; Thomas Korak (IACR Cryptol. ePrint Arch., 2016)

Reconciling d+1 Masking in Hardware and Software. - Hannes Groß; Stefan Mangard (CHES, 2017)

An Efficient Side-Channel Protected AES Implementation with Arbitrary Protection Order. - Hannes Groß; Stefan Mangard; Thomas Korak (CT-RSA, 2017)

Formal Verification of Masked Hardware Implementations in the Presence of Glitches. - Roderick Bloem; Hannes Groß; Rinat Iusupov; Bettina Könighofer; Stefan Mangard; Johannes Winter (IACR Cryptol. ePrint Arch., 2017)

Generic Low-Latency Masking. - Hannes Groß; Rinat Iusupov; Roderick Bloem (IACR Cryptol. ePrint Arch., 2017)

Reconciling d+1Masking in Hardware and Software. - Hannes Groß; Stefan Mangard (IACR Cryptol. ePrint Arch., 2017)

Higher-Order Side-Channel Protected Implementations of Keccak. - Hannes Groß; David Schaffenrath; Stefan Mangard (IACR Cryptol. ePrint Arch., 2017)

Ascon hardware implementations and side-channel evaluation. - Hannes Groß; Erich Wenger; Christoph Dobraunig; Christoph Ehrenhöfer (Microprocess. Microsystems, 2017)

Sharing Independence & Relabeling: Efficient Formal Verification of Higher-Order Masking. - Roderick Bloem; Hannes Groß; Rinat Iusupov; Martin Krenn; Stefan Mangard (IACR Cryptol. ePrint Arch., 2018)

Statistical Ineffective Fault Attacks on Masked AES with Fault Countermeasures. - Christoph Dobraunig; Maria Eichlseder; Hannes Groß; Stefan Mangard; Florian Mendel; Robert Primas (IACR Cryptol. ePrint Arch., 2018)

Masking the AES with Only Two Random Bits. - Hannes Groß; Lauren De Meyer; Martin Krenn; Stefan Mangard (IACR Cryptol. ePrint Arch., 2018)

A unified masking approach. - Hannes Groß; Stefan Mangard (J. Cryptogr. Eng., 2018)

Generic Low-Latency Masking in Hardware. - Hannes Groß; Rinat Iusupov; Roderick Bloem (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018)

First-Order Masking with Only Two Random Bits. - Hannes Groß; Ko Stoffelen; Lauren De Meyer; Martin Krenn; Stefan Mangard (TIS@CCS, 2019)

Protecting against Statistical Ineffective Fault Attacks. - Joan Daemen; Christoph Dobraunig; Maria Eichlseder; Hannes Groß; Florian Mendel; Robert Primas (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020)