An Nth order central symmetrical layout pattern for nonlinear gradients cancellation. - Xin Dai; Chengming He; Hanqing Xing; Degang Chen 001; Randall L. Geiger (ISCAS (5), 2005)

A test strategy for time-to-digital converters using dynamic element matching and dithering. - Wenbo Liu; Hanqing Xing; Le Jin; Randall L. Geiger; Degang Chen 001 (ISCAS (4), 2005)

A two-step DDEM ADC for accurate and cost-effective DAC testing. - Hanqing Xing; Degang Chen 001; Randall L. Geiger (ISCAS (5), 2005)

A self-calibrated bandgap voltage reference with 0.5 ppm/°C temperature coefficient. - Le Jin; Hanqing Xing; Degang Chen 001; Randall L. Geiger (ISCAS, 2006)

Linearity test for high resolution DACs using low-accuracy DDEM flash ADCs. - Hanqing Xing; Degang Chen 001; Randall L. Geiger (ISCAS, 2006)

Characterization of a current-mode bandgap circuit structure for high-precision reference applications. - Hanqing Xing; Le Jin; Degang Chen 001; Randall L. Geiger (ISCAS, 2006)

A fully digital-compatible BIST strategy for ADC linearity testing. - Hanqing Xing; Hanjun Jiang; Degang Chen 001; Randall L. Geiger (ITC, 2007)

On-chip at-speed linearity testing of high-resolution high-speed DACs using DDEM ADCs with dithering. - Hanqing Xing; Degang Chen 001; Randall L. Geiger (EIT, 2008)

System identification -based reduced-code testing for pipeline ADCs' linearity test. - Hanqing Xing; Degang Chen 001; Randall L. Geiger; Le Jin (ISCAS, 2008)

High-Resolution ADC Linearity Testing Using a Fully Digital-Compatible BIST Strategy. - Hanqing Xing; Hanjun Jiang; Degang Chen 001; Randall L. Geiger (IEEE Trans. Instrum. Meas., 2009)