Antenna and input stages of a 470-710 MHz silicon TV tuner for portable applications. - Vincent Rambeau; Hans Brekelmans; Marc Notten; Kevin Boyle; Jan van Sinderen (ESSCIRC, 2005)

Analyses and design of bias circuits tolerating output voltages above BVCEO. - Hugo Veenstra; G. A. M. Hurkx; Dave van Goor; Hans Brekelmans; John R. Long (IEEE J. Solid State Circuits, 2005)

Low-noise variable-gain amplifier in 90-nm CMOS for TV on mobile. - Lorenzo Tripodi; Hans Brekelmans (ESSCIRC, 2007)

A broadband RF 65 nm CMOS front-end for cable TV reception. - Marco Pifferi; Fabio Ducati; Hans Brekelmans; Lorenzo Tripodi; Kostas Doris; Mattia Borgarino (Microelectron. J., 2008)

15.2 A 2.2GHz continuous-time ΔΣ ADC with -102dBc THD and 25MHz BW. - Lucien J. Breems; Muhammed Bolatkale; Hans Brekelmans; Shagun Bajoria; Jan Niehof; Robert Rutten; Bert Oude-Essink; Franco Fritschij; Jagdip Singh; Gerard Lassche (ISSCC, 2016)

A 2.2 GHz Continuous-Time ΔΣ ADC With -102 dBc THD and 25 MHz Bandwidth. - Lucien J. Breems; Muhammed Bolatkale; Hans Brekelmans; Shagun Bajoria; Jan Niehof; Robert Rutten; Bert Oude-Essink; Franco Fritschij; Jagdip Singh; Gerard Lassche (IEEE J. Solid State Circuits, 2016)

A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW. - Pierluigi Cenci; Hans Brekelmans; Shagun Bajoria; Marcello Ganzerli; Bernard Burdiek; Robert Rutten; Yihan Gao; Muhammed Bolatkale; Paul Swinkels; Lucien J. Breems (ESSCIRC, 2022)

A 28nm 6GHz 2b Continuous-Time ΔΣ ADC with -101 dBc THD and 120MHz Bandwidth Using Digital DAC Error Correction. - Muhammed Bolatkale; Robert Rutten; Hans Brekelmans; Shagun Bajoria; Yihan Gao; Bernard Burdiek; Lucien J. Breems (ISSCC, 2022)

A 28-nm 6-GHz 2-bit Continuous-Time ΔΣ ADC With -101-dBc THD and 120-MHz Bandwidth Using Blind Digital DAC Error Correction. - Muhammed Bolatkale; Robert Rutten; Hans Brekelmans; Shagun Bajoria; Yihan Gao; Bernard Burdiek; Lucien J. Breems (IEEE J. Solid State Circuits, 2022)

A 6-GHz Continuous-Time Bandpass ΔΣ ADC With Background Filter Calibration and -100 dBc IM3 for a Mixer-Less DAB Band III Receiver. - Shagun Bajoria; Robert Rutten; Muhammed Bolatkale; Yihan Gao; Hans Brekelmans; Bernard Burdiek; Hendrik van der Ploeg; Lucien J. Breems (IEEE J. Solid State Circuits, 2025)