Wafer Scale Interconnections for GaAs Packing - Applications to RISC Architecture. - John F. McDonald 001; Hans J. Greub; Randy H. Steinvorth; Brian J. Donlan; Albert S. Bergendahl (Computer, 1987)

F-RISC/G: AlGaAs/GaAs HBT Standard Cell Library. - K. Nah; Robert F. Philhower; J. S. Van Etten; S. Simmons; V. Tsinker; James Loy; Hans J. Greub; John F. McDonald 001 (ICCD, 1991)

F-RISC/I: Fast Reduced Instruction Set Computer with GaAs (H)MESFET Implementation. - C. K. Tien; C. C. Poon; Hans J. Greub; John F. McDonald 001 (ICCD, 1991)

High-performance standard cell library and modeling technique for differential advanced bipolar current tree logic. - Hans J. Greub; John F. McDonald 001; Ted Creedon; Tadanori Yamaguchi (IEEE J. Solid State Circuits, 1991)

Design of a package for a high-speed processor made with yield-limited technology. - Atul Garg; James Loy; Hans J. Greub; John F. McDonald 001 (Great Lakes Symposium on VLSI, 1994)

Thermal Design of an Advanced Multichip Module for a RISC Processor. - Atul Garg; T.-L. Sham; Hans J. Greub; James Loy; John F. McDonald 001 (ICCD, 1994)

Supplying Known-Good Die for MCM Applications Using Low-Cost Embedded Testing. - A. Frisch; Mitch Aigner; T. Almy; Hans J. Greub; Mousumi Mitra Hazra; S. Mohr; Nicholas J. Naclerio; W. Russell; M. Stebniskey (ITC, 1995)

Design of a 32 b monolithic microprocessor based on GaAs HMESFET technology. - Chien-Kuo V. Tien; Kelvin Lewis; Hans J. Greub; Tom Tsen; John F. McDonald 001 (IEEE Trans. Very Large Scale Integr. Syst., 1997)

A very wide bandwidth digital VCO using quadrature frequency multiplication and division implemented in AlGaAs/GaAs HBT's. - Pete M. Campbell; Hans J. Greub; Atul Garg; Sam A. Steidl; Steven R. Carlough; Matthew W. Ernest; Robert F. Philhower; Cliff A. Maier; Russell P. Kraft; John F. McDonald 001 (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Accurate high-speed performance prediction for full differential current-mode logic: the effect of dielectric anisotropy. - Atul Garg; Y. L. Le Coz; Hans J. Greub; R. B. Iverson; Robert F. Philhower; Pete M. Campbell; Cliff A. Maier; Sam A. Steidl; Matthew W. Ernest; Russell P. Kraft; Steven R. Carlough; J. W. Perry; et al. (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

A 2-GHz clocked AlGaAs/GaAs HBT byte-slice datapath chip. - Steven R. Carlough; Robert A. Philhower; Cliff A. Maier; Sam A. Steidl; Pete M. Campbell; Atul Garg; Kyung-Suc Nah; Matthew W. Ernest; James R. Loy; Thomas W. Krawczyk Jr.; Peter F. Curran; Russell P. Kraft; et al. (IEEE J. Solid State Circuits, 2000)

A perturbation-aware noise convergence methodology for high frequency microprocessors. - Prashant Saxena; Kumar N. Lalgudi; Hans J. Greub; Janet Meiling Wang Roveda (ASP-DAC, 2005)